3-Handouts_Lecture_34 - EE200 DIGITAL LOGIC CIRCUIT DESIGN...

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EE200 DIGITAL LOGIC CIRCUIT DESIGN Class Notes CLASS 15-2 The material covered in this lecture will be as follows: ± Binary counter with parallel load. ± Design of counters with unused states. ± Ring counter. ± Johnson counter. After finishing this lecture, you should be able to: Understand the flexibility of using counters with parallel load to implement modulus-N counters. Understand the principle of operation of ring counters. Understand the principle of operation of Johnson counter. Binary counter with parallel load Parallel load capability is used for transmission of an initial binary number into the counter prior to the count operation. The logic diagram of a 4-bit register with parallel load , which can be used as a counter. When the input load is one, it disables the count operation and allows the transfer of the data inputs into the flip- flops. If the count and load inputs are both zero, then the outputs will not change. Only when the count is one and the load is zero, then the register will act as a counter and starts counting from the last output. The function table of this counter with parallel load is shown, followed by the logic diagram. EE200(class 15-1) Prof. M.M. Dawoud 141
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The function table for the counter shown above is as follows: Clear Clock Load Count Function 0 X X X Clear 1 1 X Load I’s 1 0 1 Count next 1 0 0 No change A counter with parallel load can be used to generate any desired
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3-Handouts_Lecture_34 - EE200 DIGITAL LOGIC CIRCUIT DESIGN...

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