Design_Project - The Design of a Multistage BJT Amplifier...

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The Design of a Multistage BJT Amplifier EE 203 Course Project Dr. Alaa El-Din Hussein OBJECTIVE In order to obtain sufficient amplification of small signal, an amplifier consisting of two or more stages is usually required. The purpose of this project is to design a multistage amplifier for the circuit shown below. Each project report will contain the hand-calculations , and a PSPICE computer simulation with printed schematic, output waveform, a netlist output and a bill of materials. Also, the statistical analysis using Monte Carlo Analysis to address the variation in the overall gain and the amplifier bandwidth due to components’ values variation should be considered. Figure 1: Two stage amplifier design example PROCEDURE 1. For the circuit on Figure 1, design a two stage common emitter amplifier for the following specifications: I E1 = 1.8mA I E2 = 4mA R E1A = 0.22R E1 R E2A = 0.4R E2 For both stages: β = 200 R 2 = 0.1 β R E1 R 4 = 0.1 β R E1 V A = 100V V E = 0.1V CC V C = 0.5V CC V BE = 0.65V • Assume C 1 = C 2 = C 3 = 1 μ F and C E1 = C E2 = 47 μ F.
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• use the PSpice model parameters for the transistors as specified below: .model Q2N2222 NPN(Is=14f Vaf=100 Bf=200 Ne=2 Ise=1e-13 Ikf=0.01 + Xtb=1.5 Br=1 Nc=21.5 Isc=1e-13 Ikr=0.01 Rc=1 Cjc=8p + Mjc=0.33 Vjc=0.70 Fc=0.5 Cje=1p Mje=0.33 Vje=0.6 + Tr= 10n Tf=150p Itf=0.6 Vtf=1.7 Xtf=3 Rb=19 + Xcjc=1 Cjs=.1p) A neat copy of all hand calculations must be submitted in the report. Hand Calculations will include all component values all π model parameters the input and output impedance at the mid-band frequencies (i.e. assume all C’s short) the voltage gain as a ratio and in db for each stage and overall PSPICE SIMULATION 2. Run PSpice version 9.1 or higher. • Draw the complete schematic diagram with all component values shown and print the
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Design_Project - The Design of a Multistage BJT Amplifier...

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