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# Sol5 - ECE 255 ELECTRONIC ANALYSIS AND DESIGN Homework 5...

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Rd Vdd Rss R2 Vdd R1 T1 0 2 4 6 8 10 12 14 16 18 20 -5 -4 -3 -2 -1 0 1 2 3 4 5 6 Gate-to-Source Voltage (V) Drain Current (mA) ECE 255 ELECTRONIC ANALYSIS AND DESIGN Fall 2009 Homework 5 Solutions Problem 1 Select element values for the circuit shown below to maintain D 4 I 6 mA for transfer functions ranging from 2 GS D V I 20 1 m A 4 = + to 2 GS D V I 7.2 1 mA 1.44 = + assuming that V DD = 16 V. Shown below are the two limiting transfer functions. Since the only requirement was D 4 I 6 mA there are many possible solutions. My first guess is represented by the solid red line where V G = 4 V and R SS = 1 k . Another easy solution is given by the broken orange line which goes through the point I D = 5 mA and V GS = - 1 V and has V G = 6 V. For the orange line GS SS D V 7V R 1.4k I 5m A = = = . The limiting load line, shown as the broken blue line , can be determined from the extreme operating points which are V GS = - 1.8091 V @ 6 mA and V GS = –.3667 V @ 4 mA. The load line running through these points has an intercept V G = 2.518 V and slope corresponding to R SS = 721.2 . To satisfy the design requirements, V G and R SS must be at least as large (or larger) than the limiting values. Completing the design using the red load line : given that V DD = 16 V we can let R 2 = 100 k . Then R 1 = 300 k to provide a gate voltage of V G = 4 V. R SS was already assumed to be 1 k . The only restriction on choosing R D is that it can not be so large as to put the FET into the ohmic region of operation. Let R D = 1 k , then V DG 6 V and either transistor will be safely in the B.P.O. region. + V i + V o

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Problem 2 Show your calculation to determine the largest value of R D that can be used in the circuit that you biased in Problem 1 that will guarantee operation in the Beyond-Pinch-Off region. The limiting case is determined by the operating point with the highest current (assuming that this operating point is also associated with the device with the largest |V P |, which is almost always the case). The gate-to-source voltage at the highest possible current is determined from 2 GS V 6 20 1 4 = + , therefore, GS 6 V 4 1 20 = - ± V GS = –1.809 or –6.191 V. Clearly the first value is correct.
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Sol5 - ECE 255 ELECTRONIC ANALYSIS AND DESIGN Homework 5...

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