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Unformatted text preview: V V Q1 Q2N3903 Q2 Q2N3904 R1-a 130k Rc-a 2.2k R2-a 39k Re-a 180 Vcc 6Vdc Vcc Vs FREQ = 1k VAMPL = .15 VOFF = 0 Vsx Cin-a 1u Rs-a 1k R1-b 130k Rc-b 2.2k R2-b 39k Re-b 180 Cin-b 1u Rs-b 1k Vs Vs Vcc Vcc Vcc Vcc Cout-a 100n Cout-b 100n Rload-a 100k Rload-b 100k Vs-ac 1mVac 0Vdc Vs 1 F 1 F 9.48 10.24 Name _________________________ ECE 255 ELECTRONIC ANALYSIS AND DESIGN Fall 2009 PSpice Design 2 Preliminary and Final Design Results Hand-drawn schematic: Intended operating point for preliminary design: I C = _____________, V CE = ______________ Explanation of why this operating point was chosen: We would like to have a 1.5 V output voltage swing about the operating point, Q . Therefore, V C < 4.5 V I C > .7 mA. Also we need to have V CE > 1.5 V + V to ensure that the transistor remains in the active region. If we take V = .85 V as the maximum from the data sheet we have V CE > 2.35 V. That leaves about 2.1 V for R E . From the gain equation, we see that R E is not going to be bigger than 200 , so the voltage drop across R E is only going to be about .2 V. Consequently, we have about 2 V of uncommitted voltage which we can distribute between R C and V CE . Component values from preliminary design: R C = ___________, R E = ___________, R 1 = ___________, R 2 = ___________, ( ) = ___________ Comments on the success (or failure) of your preliminary bias point calculations. Comments on the success (or failure) of your preliminary bias point calculations....
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This note was uploaded on 01/20/2010 for the course ECE 255 taught by Professor Staff during the Spring '08 term at Purdue University-West Lafayette.
- Spring '08