Unformatted text preview: UCSD CSE240A Fall 2009 Homework 1 Answer Key P1. −−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−− The CPI is 1.316 cyc/inst P2. −−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−− Machine C is faster with a 1.128 speedup over machine B. P3. −−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−− Applying the first (FP) optimization is best, resulting in a speedup of 1.065. P4. −−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−− 70.6% of the original execution time was spent waiting for memory. P5. −−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−− Accumulator: Load A Add B Div C Store D Fixed length instructions: 4*(6+32) = 152 bits Variable length instructions: 4*(6+32) = 152 bits Stack: Push A Push B Push C Add Div Pop D Fixed length instructions: 6*(6+32) = 228 bits Variable length instructions: 4*(6+32) + 2*6 = 164 bits GPR: Load R1, A Add R2, R1, B Div R3, R2, C Store R3, D Assuming that each ALU instruction allows 1 memory operand and there are 3 total operands allowed per instruction. Fixed length instructions: 4*(6+32+4+4) = 184 bits Variable length instructions: 2*(6+32+4) + 2*(6+32+4+4) = 176 bits Load−store: Load R1, A Load R2, B Load R3, C Add R1, R1, R2 Div R1, R1, R3 Store R1, D Assuming that there are 3 register operands allowed per instruction. Fixed length instructions: 6*(6+32) = 228 bits Variable length instructions: 4*(6+32) + 2*(6+4+4+4) = 188 bits P6. −−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−− Yes, it is a good idea. It should result in a speedup of 1.035. P7. −−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−− Assuming that arrays A and B are character arrays. Assuming no branch delay slot. ANDI LW HEAD: SUBI BEQZ DADD LW DADD DADD SW DADDI J AFTER: R1, 0, R1 R7, 0(R4) R5, R1, 101 R5, AFTER R6, R1, R3 R6, 0(R6) R6, R7, R6 R8, R1, R2 R6, 0(R8) R1, 1, R1 HEAD # # # # # # # # # # # i=0 R7 = C R5 = i − 101 GOTO AFTER if i == 101 R6 = Addr(B[i]) R6 = B[i] R6 = C + B[i] R8 = Addr(A[i]) A[i] = C + B[i] i++ GOTO HEAD The dynamic instruction count is 2 + (9 * 101) = 911 instructions. P8. −−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−− a. 20% b. 80% c. 96% ...
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- Fall '09
- SEPTA Regional Rail, Variable length, fixed length, variable length instructions, bits Variable length