BME303_lecture7 - BME303 Intro. to Computing Programmable...

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BME303 Intro. to Computing 1 Programmable Logic Array (PLA) A B C 0 0 0 0 0 1 0 1 0 0 1 1 1 0 0 1 0 1 1 1 0 1 1 1 Connections AND Array Building blocks such as the full adder
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BME303 Intro. to Computing 2 Logical Completeness You now can implement ANY truth table with AND, OR, NOT gates! A B C D 0 0 0 0 0 0 1 0 0 1 0 1 0 1 1 0 1 0 0 0 1 0 1 1 1 1 0 0 1 1 1 0 1. AND: combinations that yield a "1" in the truth table. 2. OR: the results of the AND gates.
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BME303 Intro. to Computing 3 2 Types of Logic Structures 1. Combinational Logic Circuit output depends only on the current inputs Stateless “Decision element” 2. Sequential Logic Circuit output depends on the sequence of inputs (past and present) stores information (state) from past inputs
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BME303 Intro. to Computing 4 Problem Language Machine (ISA) Architecture Algorithms Micro-architecture Circuits Devices Data Path Memory Storage Elements R-S Latch Gated D latch Register Logic Structures Decoder Mux (multiplexer) Adder Logic Gates NOT OR AND Other gates Transistors Devices, Circuits, … Bottom Up
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BME303 Intro. to Computing 5 R-S Latch: Simple Storage Element R is used to “reset” or “clear” the element – set it to zero. S is used to “set” the element – set it to one. If both R and S are one, “out” could be either zero or one. – “quiescent” state -- holds ( STORE ) its previous value – note: if a is 1, b is 0, and vice versa 1 0 1 1 1 1 0 0 1 1 0 0 1 1
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BME303 Intro. to Computing 6 Clearing the R-S latch • Suppose we start with output = 1, then change R to zero. Output changes to zero. Then set R=1 to “store” value in quiescent state. 1 0 1 1 1 1 0 0 1 0 1 0 0 0 1 1
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BME303 Intro. to Computing 7 Setting the R-S Latch • Suppose we start with output = 0, then change S to zero. Output changes to one. Then set S=1 to “store” value in quiescent state. 1 1 0 0 1 1 0 1 1 1 0 0
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BME303 Intro. to Computing 8 R-S Latch Summary R = S = 1 – hold current value of the output in latch S = 0, R=1 – set output value to 1 R = 0, S = 1 – reset output value to 0 R = S = 0 – both outputs equal one – final state depends on the electrical properties of gates
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BME303 Intro. to Computing 9 R-S Latch (004_RS_Latch.lgi)
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BME303 Intro. to Computing 10 Gated D-Latch • Two inputs: D (data) and WE (write enable) – when WE = 1 , latch is set to value of D • S = NOT(D), R = D – when WE = 0 , latch holds (STORE) previous value • S = R = 1
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BME303 Intro. to Computing 11 Gated D Latch (005_D_Latch.lgi)
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BME303 Intro. to Computing 12 Register • An n-bit register
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This note was uploaded on 01/24/2010 for the course BME 303 taught by Professor Ren during the Fall '08 term at University of Texas at Austin.

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BME303_lecture7 - BME303 Intro. to Computing Programmable...

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