Lec12 - EE319K IntroductiontoMicrocontrollers...

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13-1 EE 319K Introduction to Microcontrollers Lecture 12: Serial Communications  Interface (SCI), Producer-Consumer  problems, FIFO Queues, Lab7  Read Book Sections 8.1, 8.2, 12.3.2, 12.3.3, 12.4
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Ramesh Yerraballi 13-2 Serial Comm. Interface (SCI) This protocol is also  known as UART  (Universal  Asynchronous, Receiver  Transmitter) Originally used to  connect i/o terminals to  mainframes. Neither fast nor reliable  but simple SCI Device Driver Public routines SCI1_Init SCI1_InChar SCI1_OutChar Private Objects SCI1CR2 SCI1BD SCI1SR1 SCI1DRL
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Ramesh Yerraballi 13-3 SCI Basics Baud Rate : The total number  of bits transmitted per second baud-rate = 1/bit-time Mode Bit (M) : Selects 8- bit(M=0) or 9-bit (M=1) data  frames 5V 0V b 0 b 1 b 2 b 3 b 4 b 5 b 6 serial port b 7 one frame start stop Frame : The smallest  complete unit of serial  transmission.  Bandwidth : The amount of  data or usual information  transmitted per second. A serial data frame with M=0 number of information bits/frame Total number of bits/frame x baud-rate Bandwidth =
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Ramesh Yerraballi 13-4 Transmitting in Asynchronous Mode The software writes to SCI1DRL, then 8 bits of data are moved to the shift register start and stop bits are added shifts in 10 bits of data one at a time on TxD line shift one bit per bit time (=1/baudRate) SCI0DRL w rite data 1 T8 0 stop start shift clock data TxD 7 6 5 4 3 2 1 0 9S12C32 9S12DP512 or PS1 PS3 transm it data register Data and shift registers implement the serial transmission
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Ramesh Yerraballi 13-5 Receiving in Asynchronous Mode The receiver waits for the 1 to 0 edge signifying a start bit, then shifts in 10 bits of data one at a time from RxD line shift one bit per bit time (=1/baudRate) start and stop bits are removed checked for noise and framing errors 8 bits of data are loaded into the SCIDRL Data and shift registers implement the receive serial interface SCI0DRL read data 1 R8 0 stop start shift clock data RxD 7 6 5 4 3 2 1 0 or receive data register 9S12C32 9S12DP512 PS0 PS2
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Ramesh Yerraballi 13-6 SCI Details SCI1BD : Determines the baud rate:           Say  SCI1BD[12:0] => Integer BR    SCI Baud-rate = MClock/(16xBR) Mclock on 9S12DP512 is 24 MHz (with PLL in Load mode);  8 MHz otherwise. TE  is the Transmitter Enable bit  RE  is the Receiver Enable bit.   Addr Bit 7 6 5 4 3 2 1 Bit 0 Name $00D2 LOOPS SWAI RSRC M WAKE ILT PE PT SCI1CR1 $00D3 TIE TCIE RIE ILIE TE RE RWU SBK SCI1CR2 $00D4 TDRE RDRF IDLE OR NF FE PF SCI1SR1 $00D5 0 0 0 0 BRK13 TXDIR RAF SCI1SR2 $00D6 R8 0 0 0 0 0 0 SCI1DRH $00D7 R7T7 R6T6 R5T5 R4T4 R3T3 R2T2 R1T1 R0T0 SCI1DRL Addr msb lsb Name $00D0 - - - 12 11 10 9 8 7 6 5 4 3 2 1 0 SCI1BD
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Ramesh Yerraballi 13-7 … SCI Details TDRE  is the Transmit  Data Register Empty  flag. 
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Lec12 - EE319K IntroductiontoMicrocontrollers...

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