Dissertation-Shenchih-0725

Dissertation-Shenchih-0725 - AN ARCHITECTURAL APPROACH FOR...

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AN ARCHITECTURAL APPROACH FOR REDUCING POWER AND INCREASING SECURITY OF RFID TAGS by Shen-Chih Tung B.S. National Taiwan Ocean University, Taiwan, 1997 M.S. Telecommunication, University of Pittsburgh, 2000 Submitted to the Graduate Faculty of the Swanson School of Engineering in partial fulfillment of the requirements for the degree of Doctor of Philosophy University of Pittsburgh 2008
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UNIVERSITY OF PITTSBURGH SWANSON SCHOOL OF ENGINEERING This dissertation was presented by Shen-Chih Tung It was defended on March 28, 2008 and approved by Alex K. Jones, Assistant Professor, Department of Electrical and Computer Engineering Marlin H. Mickle, Nickolas A. DeCecco Professor, Electrical Engineering Department James T. Cain, Professor Emeritus, Department of Electrical Engineering Allen Cheng, Assistant Professor, Department of Electrical Engineering Ahmed Amer, Assistant Professor, Department of Computer Science Dissertation Director: Alex K. Jones, Assistant Professor, Department of Electrical and Computer Engineering ii
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AN ARCHITECTURAL APPROACH FOR REDUCING POWER AND INCREASING SECURITY OF RFID TAGS Shen-Chih Tung, PhD University of Pittsburgh, 2008 Radio Frequency Identification (RFID) technology is currently employed for a variety of appli- cations such as RFID-based wireless payment, healthcare, homeland security, asset management, etc. Due to newer privacy requirements and increasingly secure applications, typical RFID tags are required to expand security features such as data encryption and safe transactions. However, RFID tags have extremely strict low-power consumption requirements. Thus, reduced power con- sumption and secure data transactions are two main problems for the next generation RFID tags. This dissertation presents an architectural approach to address these two main problems. This dissertation provides a multi-domain solution to improve the power consumption and security, while also reducing design time and verification time of the system. In particular, I describe (1) a smart buffering technique to allow a tag to remain in a standby mode until addressed, (2) a multi-layer, low-power technique that transcends the passive-transaction, physical, and data layers to provide secure transactions, (3) an FPGA-based traffic profiler system to generate traces of RFID communications for both tag verification and power analysis without the need of actual hardware, and (4) a design automation technique to create physical layer encoding and decoding blocks in hardware suitable for RFID tags. This dissertation presents four contributions: (1) as a result, based on a Markov Process en- ergy model, the smart buffering technique is shown to reduce power consumption by 85% over a traditional active tag; (2) the multi-layer, low-power security technique provides protection against malicious reader attacks to disable the tag, to steal the information stored in or communicated to the device. The power consumption overhead for implementing these layers of security is increased iii
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Dissertation-Shenchih-0725 - AN ARCHITECTURAL APPROACH FOR...

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