cache - 6.004 Caches Fall 2009 Announcements Handouts...

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6.004 http://6004.csail.mit.edu/currentsemester/[12/1/2009 9:20:32 PM] Fall 2009 Announcements Handouts Tutorial problems Past Quizzes On-line assignments Course info Course description Course objectives Course calendar Lab hours Courseware Suggestions Suggestion Box Previous terms Lab Queue WIKI (NEW! Lab hin Caches indicates problems that have been selected for discussion in section, time permitting. Problem 1. The diagram above illustrates a blocked, direct-mapped cache for a computer that uses 32-bit data words and 32-bit byte addresses. A. What is the maximum number words of data from main memory that can be stored in the cache at any one time? Maximum number of data words from main memory = (16 lines)(4 words/line) = 64 words B. How many bits of the address are used to select which line of the cache is accessed? With 16 cache lines, 4 bits of the address are required to select which line of the cache is accessed. C. How many bits wide is the tag field? Bits in the tag field = (32 address bits) - (4 bits to select line) - (4 bits to select word/byte) = 24 bits D. Briefly explain the purpose of the one-bit V field associated with each cache line. The tag and data fields of the cache will always have value in them, so the V bit is used to denote whether these value are consistent (valid) with what is in memory. Typically the V bit for each line in the cache is set to "0" when the machine is reset or the cache is flushed.
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6.004 http://6004.csail.mit.edu/currentsemester/[12/1/2009 9:20:32 PM] E. Assume that memory location 0x2045C was present in the cache. Using the row and column labels from the figure, in what cache location(s) could we find the data from that memory location? What would the value(s) of the tag field(s) have to be for the cache row(s) in which the data appears? The cache uses ADDR[7:4] to determine where data from a particular address will be stored in the cache. Thus, location 0x0002045C will be stored in line 5 of cache. The tag field should contain the upper 24 bits of the address, i.e., 0x000204. Note that the bottom 4 bits of the address (0xC) determine which word and byte of the cache line is being referenced. F. Can data from locations 0x12368 and 0x322FF8 be present in the cache at the same time? What about data from locations 0x2536038 and 0x1034? Explain. Location 0x12368 will be stored in line 6 of the cache. Location 0x322F68 will be stored in line F of the cache. Since the lines differ, both locations can be cached at the same time. However, locations 0x2536038 and 0x1034 both would be stored in line 3 of cache, so they both could not be present in the cache at the same time. G. When an access causes a cache miss, how many words need to be fetched from memory to fill the appropriate cache location(s) and satisfy the request? There are 4 words in each line of the cache and since we only have one valid bit for the whole line, all
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This note was uploaded on 02/01/2010 for the course ECE 585 taught by Professor Faust during the Fall '08 term at Portland State.

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cache - 6.004 Caches Fall 2009 Announcements Handouts...

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