CMOS_VLSI_Design_3e_-_David_Harris___H_E_Weste

CMOS_VLSI_Design_3e_-_David_Harris___H_E_Weste - Solutions...

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Solutions 1 Note: solutions to simulation exercises are not included. Chapter 12 is not yet complete, and a few other solutions are presently missing. DH 8/4/04 Chapter 1 1.1 Starting with 42,000,000 transistors in 2000 and doubling every 26 months for 10 years gives transistors. 1.2 Some recent data includes: Table 1: Microprocessor transistor counts Date CPU Transistors (millions) 3/22/93 Pentium 3.1 10/1/95 Pentium Pro 5.5 5/7/97 Pentium II 7.5 2/26/99 Pentium III 9.5 10/25/99 Pentium III 28 11/20/00 Pentium 4 42 8/27/01 Pentium 4 55 2/2/04 Pentium 4 HT 125 M2 1 0 12 26 ----------------   1B
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SOLUTIONS 2 The transistor counts double approximately every 24 months. 1.3 1.4 1 10 100 1990 1995 2000 2005 Year Transistors (Millions) A B C D Y A B Y C D D A B C A B C D D A B C Y A B C C A B B A A B (c) Y (b) (a)
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CHAPTER 1 SOLUTIONS 3 1.5 1.6 A Y (a) A B Y (b) A B Y (c) (d) A C B Y Y B B C C B A A C C B B B A A
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SOLUTIONS 4 1.7 1.8 1.9 The minimum area is 5 tracks by 5 tracks (40 λ x 40 λ = 1600 λ 2 ). 1.10 The layout is 40 λ x 40 λ if minimum separation to adjacent metal is considered, exactly as the track count estimated. A0 A1 A1 Y0 Y1 Y2 Y3 (a) Y1 Y0 A2 (b) A VDD GND B C Y D
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CHAPTER 1 SOLUTIONS 5 1.11 1.12 5 tracks wide by 6 tracks tall, or 1920 λ 2 . 1.13 This latch is nearly identical save that the inverter and transmission gate feedback has been replaced by a tristate feedaback gate. n+ n+ p substrate p+ p+ n well A Y VDD n+ GND B Y D CLK CLK CLK CLK
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SOLUTIONS 6 1.14 (c) 4 x 6 tracks = 32 λ x 48 λ = 1536 λ 2 . (e) The layout size matches the stick diagram. 1.15 (c) 5 x 6 tracks = 40 λ x 48 λ = 1920 λ 2 . (with a bit of care) (d-e) The layout should be similar to the stick diagram. 1.16 (c) 6 tracks wide x 7 tracks high = (48 x 56) = 2688 λ 2 . (a) (b) A B C Y A VDD GND B C Y (d) (b) A B C A VDD GND B C F D A B C D (a) D F A B C C A B B A A B (a) Y B VDD GND A C Y A B (b)
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CHAPTER 2 SOLUTIONS 7 1.17 20 transistors, vs. 10 in 1.16(a). 1.18 (c) The area of this stick diagram is 11 x 6 tracks = 4224 λ 2 if the polysilicon can be bent. 1.19 The lab solutions are available to instructors on the web. Chapter 2 A Y B A C B C G0 G1 G2 G3 P1 P2 P3 G3 P3 G2 P2 G1 P1 G0 G (a) VDD GND G0 G1 G2 G3 P2 P3 (b) G
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SOLUTIONS 8 2.1 2.2 In (a), the transistor sees V gs = V DD and V ds = V DS . The current is In (b), the bottom transistor sees V gs = V DD and V ds V 1 . The top transistor sees V gs = V - V 1 and V ds V V 1 . The currents are Solving for V 1 , we find Substituting V 1 indo the I 2 equation and simplifying gives I 1 = I 2 . 2.3 The body effect does not change (a) because V sb = 0. The body effect raises the threshold of the top transistor in (b) because V sb > 0. This lowers the current through the series transistors, so I DS 1 > I 2 . 2.4 C permicron = ε L / t ox = 3.9 * 8.85e-14 F/cm * 90e-7 cm / 16e-4 μ m= 1.94 fF/ μ m. ( 29 14 2 8 3. 9 8.85 10 35 0 12 0/ 100 10 ox W WW C AV L LL b mm - -  •⋅ = ==   0 1 2 3 4 5 0 0.5 1 1.5 2 2.5 V ds I ds (mA) V gs = 5 V gs = 4 V gs = 3 V gs = 2 V gs = 1 1 22 DS D S D D t DS V I V VV b = -- ( 29 ( 29 ( 29 1 1 2 1 11 D S D D t D D t V I V V V V bb - = - - = - - ( 29 ( 29 2 1 2 D D t D D t D D t V V VV V = - -
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CHAPTER 2 SOLUTIONS 9 2.5 The minimum size diffusion contact is 4 x 5 λ , or 1.2 x 1.5 μ m. The area is 1.8 μ m 2 and perimeter is 5.4 μ m. Hence the total capacitance is
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CMOS_VLSI_Design_3e_-_David_Harris___H_E_Weste - Solutions...

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