Lecture17-18-apr24 -...

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Unformatted text preview: ‫۳‐۳‐۲‐ﺗﺮﺍﺯﻳﺴﺘﻮﺭﻫﺎﻱ ﺍﺛﺮ ﻣﻴﺪﺍﻧﻲ ﺍﻛﺴﻴﺪ ﻓﻠﺰ‬ ‫)‪(Metal oxide Field Effect Transistors‬‬ ‫ﺩﺭ ﻣﻘﺎﺑﻞ ﺗﺮﺍﻧﺰﻳﺴﺘﻮﺭﻫﺎﻱ ‪ BJT‬ﻛﻪ ﺍﻟﻤﺎﻥﻫﺎﻱ ﻛﻨﺘﺮﻝ ﺷﻮﻧﺪﻩ ﺗﻮﺳﻂ ﺟﺮﻳﺎﻥ ﻭﺭﻭﺩﻱ ﻫﺴﺘﻨﺪ، ﺗﺮﺍﻧﺰﻳﺴﺘﻮﺭﻫﺎﻱ‬ ‫‪FET‬ﺗﻮﺳﻂ ﻭﻟﺘﺎﮊ ﮔﻴﺖ )‪(Gate‬ﻛﻨﺘﺮﻝ ﻣﻲﺷﻮﻧﺪ.‬ ‫ﺗﺮﺍﻧﺰﻧﻴﺴﺘﻮﺭﻫﺎﻱ ‪MOSFET‬ﻧﻮﻉ ﺍﻓﺰﺍﻳﺸﻲ )ﻭ ﻛﻠﻴﻪ ﺗﺮﺍﻧﺰﻳﺴﺘﻮﺭﻫﺎﻱ ﺍﺛﺮ ﻣﻴﺪﺍﻧﻲ( ﺧﻮﺩ ﻧﻴﺰ ﺑﻪ ﺩﻭ ﻧﻮﻉ ﻛﺎﻧﺎﻝ ‪ n‬ﻭ‬ ‫ﻛﺎﻧﺎﻝ ‪p‬ﺗﻘﺴﻴﻢ ﻣﻲﺷﻮﻧﺪ، ﺩﺭ ﺍﻳﻨﺠﺎ ﺑﻪ ﺗﺸﺮﻳﺢ ﻋﻤﻠﻜﺮﺩ ﻭ ﺳﺎﺧﺘﻤﺎﻥ ﻧﻮﻉ ﻛﺎﻧﺎﻝ ‪ (NMOS) n‬ﻣﻲﭘﺮﺩﺍﺯﻳﻢ .ﻧﻮﻉ ‪‐ p‬‬ ‫ﻛﺎﻧﺎﻝ ﺑﻪ ﻃﺮﻳﻘﻲ ﻣﺸﺎﺑﻪ ﻛـﺎﺭ ﻣﻲﻛﻨﺪ. ﻓﻘﻂ ﺟﻬﺖ ﻭﻟﺘﺎﮊ ﻭ ﺟﺮﻳﺎﻧﻬﺎﻱ ﺁﻥ ﻣﻌﻜﻮﺱ ﻧﻮﻉ ‪ n‬ﺍﺳﺖ.‬ ‫‪ MOSFET‬ﻫﺎ )ﻭ ﻛﻠﻴﻪ ﺗﺮﺍﻧﺰﻳﺴﺘﻮﺭﻫﺎﻱ ﺍﺛﺮ ﻣﻴﺪﺍﻧﻲ( ﺩﺍﺭﺍﻱ ﺳﻪ ﺗﺮﻣﻴﻨﺎﻝ ﺍﺻﻠﻲ ‪ Source ،Drain‬ﻭ ‪Gate‬‬ ‫ﻣﻴﺒﺎﺷﻨﺪ. ﺟﺮﻳﺎﻥ ﺍﺻﻠﻲ ﺩﺭ ﺍﻳﻦ ﺗﺮﺍﻧﺰﻳﺴﺘﻮﺭﻫﺎ ﺑﻴﻦ ﺗﺮﻣﻴﻨﺎﻝ ‪ Drain‬ﻭ ‪ Source‬ﺩﺭ ﺣﺮﻛﺖ ﺑﻮﺩﻩ ﻭ ﺍﻳﻦ ﺟﺮﻳﺎﻥ‬ ‫ﺗﻮﺳﻂ ﻭﻟﺘﺎﮊ ﺑﻴﻦ ‪ Gate‬ﻭ ‪(VGS) Source‬ﻛﻨﺘﺮﻝ ﻣﻴﺸﻮﺩ.‬ ‫ﺗﺮﺍﻧﺰﻧﻴﺴﺘﻮﺭﻫﺎﻱ ‪MOSFET‬ﺧﻮﺩ ﺑﻪ ﺩﻭ ﻧﻮﻉ ﺗﻬﻲ )‪(Depletion Type‬ﻭ ﺍﻓﺰﺍﻳﺸﻲ‬ ‫‪(Enhancement‬‬ ‫)‪Type‬ﺗﻘﺴﻴﻢ ﻣﻲﺷﻮﻧﺪ. ﺗﺮﺍﺯﻧﻴﺴﺘﻮﺭﻫﺎﻱ ﻧﻮﻉ ﺗﻬﻲ )ﻣﺎﻧﻨﺪ ‪ JFET‬ﻫﺎ( ﺩﺭ ﺣﺎﻟﺖ ﻋﺎﺩﻱ )0=‪ (VGS‬ﺭﻭﺷﻦ‬ ‫)‪(ON‬ﺑﻮﺩﻩ ﻭ ﺑﺎ ﺍﻋﻤﺎﻝ‪VGS= -VP‬ﺧﺎﻣﻮﺵ )‪ (Off‬ﻣﻲﺷﻮﺩ. ﺗﺮﺍﻧﺰﻳﺴﺘﻮﺭﻫﺎﻱ ﻧﻮﻉ ﺍﻓﺰﺍﻳﺸﻲ ﺩﺭ ﺣﺎﻟﺖ ﻋﺎﺩﻱ‬ ‫ﺧﺎﻣﻮﺵ ﺑﻮﺩﻩ ﻭ ﺑﺎ ﺍﻋﻤﺎﻝ ﻭﻟﺘــﺎﮊ ‪ VGS=VGS ON‬ﺭﻭﺷﻦ ﻣﻲﺷﻮﻧﺪ. ﺩﺭ ﺍﻳﻦ ﺑﺨﺶ ﻓﻘﻂ ﺑﻪ ﺗﻮﺿﻴﺢ ﻋﻤﻠﻜﺮﺩ ﻭ‬ ‫ﺧﺼﻮﺻﻴـﺎﺕ ﺗﺮﺍﻧﺰﻳﺴﺘﻮﺭﻫﺎﻱ ﺍﻓﺰﺍﻳﺸﻲ ﻣﻲﭘﺮﺩﺍﺯﻳﻢ.‬ ‫ﺩﺭ ﺗﺮﺍﻧﺰﻳﺴﺘﻮﺭﻫﺎﻱ ‪ MOSFET‬ﻫﻤﻮﺍﺭﻩ ‪GATE‬‬ ‫ﺗﻮﺳﻂ ﻳﻚ ﻻﻳﻪ ﻋﺎﻳﻖ 2‪ Sio‬ﺍﺯ ﻣﺎﺩﻩ ﺯﻣﻴﻨﻪ ﺟﺪﺍ ﮔﺮﺩﻳﺪﻩ‬ ‫ﻧﺎﺣﻴﻪ ﺗﻬﻲ‬ ‫‪SS‬‬ ‫‪(Substrate‬‬ ‫)‬ ‫ﺳﺎﺧﺘﻤﺎﻥ ﺩﺍﺧﻠﻲ ﻳﻚ ﺗﺮﺍﺯﻳﺴﺘﻮﺭ ‪ MOSFET‬ﻧﻮﻉ‬ ‫ﺍﻓﺰﺍﻳﺸﻲ ) ﻛﺎﻧﺎﻝ‪ ( n‬ﻭ ﻧﻤﺎﺩ ﻣﺮﺑﻮﻃﻪ ﺩﺭ ﺷﻜﻞ ﻣﻘﺎﺑﻞ‬ ‫ﻧﺸﺎﻥ ﺩﺍﺩﻩ ﺷﺪﻩ ﺍﺳﺖ.‬ ‫2‪Sio‬‬ ‫‪P-type‬‬ ‫‪substrate‬‬ ‫‪n‬‬ ‫++‬ ‫--‬ ‫+-‬ ‫‪E GSS‬‬ ‫ﺍﺳﺖ ﻭ ﻟﺬﺍ ﺟﺮﻳﺎﻥ ‪ IG‬ﻫﻤﻮﺍﺭﻩ ﺻﻔﺮ ﻣﻲﺑﺎﺷﺪ. ﺍﻳﺮﻭﻟــﻪ‬ ‫‪D‬‬ ‫)‪(Drain‬‬ ‫ﺍﺗﺼﺎﻻﺕ ﻓﻠﺰﻱ‬ ‫‬‫‬‫‬‫-‬ ‫‪G‬‬ ‫)‪(Gate‬‬ ‫‪n‬‬ ‫ﻛـﺮﺩﻥ ‪ Gate‬ﺩﺭ ﺗﺮﺍﻧﺰﻳﺴﺘﻮﺭﻫﺎﻱ ‪ MOSFET‬ﻣﻮﺟﺐ‬ ‫‪S‬‬ ‫)‪(source‬‬ ‫ﻣﻲﮔﺮﺩﺩ ﻛﻪ ﺍﻣﭙﺪﺍﻧﺲ ‪ Gate‬ﺑﺎﻻﺗﺮ ﺍﺯ ‪10/000 M‬‬ ‫‪Ω‬ﺑﺎﺷﺪ.‬ ‫ﺩﺭ ﺻﻮﺭﺕ ﻋﺪﻡ ﺍﻋﻤــﺎﻝ ﻫﺮﮔــﻮﻧﻪ ﻭﻟﺘﺎﮊ ﺑﻪ ﭘﺎﻳﺎﻧﻪﺎ، ﻳﻚ‬ ‫ﻧﺎﺣﻴﻪ ﺗﻬﻲ ﺩﺭ ﻣﺤﻞ ﺍﺗﺼــﺎﻝ ﻣﺎﺩﻩﻫﺎﻱ ‪ n‬ﻭ ‪ p‬ﺗﺸﻜﻴﻞ‬ ‫ﻣﻲﺷﻮﺩ.‬ ‫ﺣﺎﻝ ﺑﻪ ﺩﻭ ﻭﺿﻌﻴﺖ 0 = ‪ VGS‬ﻭ 0> ‪ VGS‬ﻣﻲﭘﺮﺩﺍﺯﻳﻢ.‬ ‫‪D‬‬ ‫ﻧﻤﺎﺩ ﺧﻼﺻﻪ‬ ‫‪S‬‬ ‫‪G‬‬ ‫‪D‬‬ ‫‪S‬‬ ‫ﻧﻤﺎﺩ ﺍﺻﻠﻲ‬ ‫‪G‬‬ ‫‪GSS‬‬ ‫ﻣﻲﮔﺮﺩﺩ. ﺍﻳﻦ ﻣﻴﺪﺍﻥ ﻣﻮﺟﺐ ﺩﻓﻊ ﺣﻔﺮﻩﻫﺎ ﺍﺯ ﻧﺰﺩﻳﻜﻲ )‬ ‫‪ gate‬ﺑﻪ ﺳﻤــﺖ ﻗﺴﻤﺖ ﻋﻤﻴﻖ ﺗﺮ ﻣﺎﺩﻩ ‪ (p‬ﻭ ﺣﺬﺏ‬ ‫ﺍﻟﻜﺘﺮﻭﻧﻬﺎ ﺑﻪ ﻧﺎﺣﻴﻪ ﻣﺠﺎﻭﺭ ‪ gate‬ﻣﻲﮔﺮﺩﺩ. ﺑﻌﻠﺖ ﻭﺟﻮﺩ ﻋﺎﻳﻖ‬ ‫‪SS‬‬ ‫‪(Substrate‬‬ ‫)‬ ‫ﺣﺎﻟﺖ 0=‪ VGS‬ﻭ 0≥ ‪VDS ≥0 : VDS‬ﻣﻮﺟﺐ ﺗﻐﺬﻳﻪ ﻣﻌﻜﻮﺱ ﺍﺗﺼﺎﻝ ‪ Pn‬ﺩﺭ ﺍﻃﺮﺍﻑ ‪ Drain‬ﻭ‬ ‫‪ Source‬ﮔﺮﺩﻳﺪﻩ ﻭ ﺩﻳﻮﺩ ﻭﺍﻗﻊ ﺑﻴﻦ ﺗﺮﻣﻴﻨﺎﻝ ‪ D‬ﻭ ‪) S‬ﻳﺎ ‪ (SS‬ﺩﺭ ﺗﻐﺬﻳﻪ ﻣﻌﻜــﻮﺱ ﻗﺮﺍﺭ ﻣﻴﮕﻴﺮﺩ.‬ ‫ﺑﻌﻠﺖ ﻧﺒﻮﺩ ﻳﻚ ﻛﺎﻧﺎﻝ ‪ n‬ﺑﻴﻦ ‪ Source‬ﻭ ‪ Drain‬ﻫﻴﭽﮕﻮﻧﻪ ﻫﺪﺍﻳﺘﻲ )ﺑﺠﺰ ﺟﺮﻳﺎﻥ ﺍﺷﺒﺎﻉ ﻣﻌﻜﻮﺱ(‬ ‫ﺻﻮﺭﺕ ﻧﻤﻲﮔﻴﺮﺩ: 0 ≈‪ID‬‬ ‫2‪Sio‬‬ ‫‪D‬‬ ‫ﺣﺎﻟﺖ 0>‪ VGS‬ﻭ 0≥ ‪ : VDS‬ﺑﺎ ﺍﻋﻤﺎﻝ 0≥ ‪ VGS‬ﻳﻚ‬ ‫ﻧﺎﺣﻴﻪ ﺗﻬﻲ‬ ‫)‪(Drain‬‬ ‫‪n‬‬ ‫‪ ε‬ﺑﻴﻦ ‪ G‬ﻭ ‪ SS‬ﺗﺸﻜﻴﻞ‬ ‫ﻣﻴﺪﺍﻥ ﺍﻟﻜﺘﺮﻳﻴﻜﻲ‬ ‫‪P-type‬‬ ‫‪substrate‬‬ ‫++‬ ‫--‬ ‫‬‫‬‫‬‫-‬ ‫+-‬ ‫‪ε GSS‬‬ ‫2‪Sio‬ﺍﻟﻜﺘﺮﻭﻧﻬﺎ ﻧﻤﻲﺗﻮﺍﻧﻨﺪ ﺣﺬﺏ ‪ gate‬ﺷﺪﻩ ﻭ ﺩﺭ ﭘﺸﺖ‬ ‫ﻻﻳﻪ ﻋﺎﻳﻖ ﻣﺘﻤﺮﻛﺰ ﻣﻲﺷﻮﻧﺪ. ﺍﻳﻦ ﺑﻪ ﻣﻔﻬﻮﻡ ﺗﺸﻜﻴﻞ ﻛﺎﻧﺎﻟﻲ ﺍﺯ‬ ‫ﻣﺎﺩﻩ ‪ n‬ﺩﺭ ﺍﻳﻦ ﻧﺎﺣﻴﻪ )ﺑﻴﻦ ﺗﺮﻣﻴﻨﺎﻝ ‪ D‬ﻭ ‪ ( S‬ﺑﺮﺍﻱ ﻫﺪﺍﻳﺖ‬ ‫ﺟﺮﻳﺎﻥ ﺑﻴﻦ ﺗﺮﻣﺒﻨﺎﻝ ‪ D‬ﻭ ‪ S‬ﻣﻲﺑﺎﺷﺪ...........‬ ‫ﻣﺎﺩﻩ ‪ n‬ﺩﺭ ﺗﺮﻣﻴﻨﺎﻝﻫﺎﻱ ‪ D‬ﻭ ‪ S‬ﺗﻮﺳﻂ ﻛﺎﻧﺎﻟﻲ ﺍﺯ ﻣﺎﺩﻩ ‪ n‬ﺑﻬﻢ ﻣﺘﺼﻞ ﻣﻲﺷﻮﻧﺪ.‬ ‫ﺍﺗﺼﺎﻻﺕ ﻓﻠﺰﻱ‬ ‫‪G‬‬ ‫)‪(Gate‬‬ ‫‪n‬‬ ‫‪S‬‬ ‫)‪(source‬‬ ‫ﻣﻘﺪﺍﺭ ‪ VGS‬ﺭﺍ ﻛﻪ ﺍﻓﺰﺍﻳﺸﻲ ﻛﺎﻓﻲ ﺩﺭ ﺟﺮﻳﺎﻥ ‪ ID‬ﺍﻳﺠﺎﺩ ﻛﻨﺪ، ﻭﻟﺘﺎﮊ ﺁﺳﺘﺎﻧﻪ )‪(Threshold Voltage‬‬ ‫ﻧﺎﻣﻴﺪﻩ ﻭ ﺑﺎ ‪ VT‬ﻳﺎ )‪ VGS(th‬ﻣﺸﺨﺺ ﻣﻲﻧﻤﺎﻳﻨﺪ. ﺣﺎﻝ ﺗﺤﺖ ﺷﺮﺍﺋﻂ )‪ ،VGS>VGS(th‬ﺑﺎ ﺍﻋﻤﺎﻝ ﻭﻟﺘﺎﮊ‬ ‫0>‪ ، VDS‬ﺍﻟﻜﺘﺮﻭﻥﻫﺎ )ﺣﺎﻣﻞﻫﺎﻱ ﺍﻛﺜﺮﻳﺖ ﺩﺭ ﻣﺎﺩﻩ ‪ (n‬ﺍﺯ ﻃﺮﻳﻖ ﺗﺮﻣﻴﻨﺎﻝ ﺳﻮﺭﺱ ﻭﺍﺭﺩ ﻣﺎﺩﻩ ‪ n‬ﺷﺪﻩ ﻭ ﺍﺯ‬ ‫ﻃﺮﻳﻖ ﻛﺎﻧﺎﻝ ‪ n‬ﺑﻮﺟﻮﺩ ﺁﻣﺪﻩ ﺑﻪ ﺳﻤﺖ ﺗﺮﻣﻴﻨﺎﻝ ‪ D‬ﺣﺮﻛﺖ ﻣﻲﻧﻤﺎﻳﻨﺪ. ﺑﺎ ﺗﻮﺟﻪ ﺑﻪ ﺍﻳﻨﻜﻪ ﺗﺮﻣﻴﻨﺎﻝ ‪ S‬ﻣﻨﺸﺎﺀ‬ ‫ﺟﺮﻳﺎﻥ ﺣﺎﻣﻞ ﺍﻛﺜﺮﻳﺖ ﻣﻲﺑﺎﺷﺪ ﺑﻪ ﺁﻥ ‪ Source‬ﻭ ﺍﺯ ﺁﻧﺠﺎﻳﻲ ﻛﻪ ﺗﺮﻣﻴﻨﺎﻝ ‪ D‬ﻣﺤﻞ ﺧﺮﻭﺝ ﺣﺎﻣﻞﻫﺎﻱ‬ ‫ﺍﻛﺜﺮﻳﺖ ﺍﺳﺖ ﺑﻪ ﺁﻥ ‪ Drain‬ﮔﻔﺘﻪ ﻣﻲﺷﻮﺩ. )ﺟﺮﻳﺎﻥ ﻗﺮﺍﺭﺩﺍﺩﻱ ﻫﻤﻮﺍﺭﻩ ﺍﺯ ‪ drain‬ﺑﻪ ﺳﻤﺖ ‪source‬‬ ‫ﻣﻲﺑﺎﺷﺪ(‬ ‫ﺑﺎ ﺗﻮﻪ ﺑﻪ ﻧﻘﺶ ﻣﻬﻢ ﻻﻳﻪ 2‪ Sio‬ﺩﺭ ﻋﻤﻠﻜﺮﺩ ﺗﺮﺍﻧﺰﻳﺴﺘﻮﺭﻫﺎﻱ ‪ ، MOSFET‬ﻭ ﺑﺎ ﺗﻮﺣﻪ ﺑﻪ ﻧﺎﺯﻙ ﺑﻮﺩﻥ ﺍﻳﻦ‬ ‫ﻻﻳﻪ ﻋﺎﻳﻖ ، ‪ MOSFET‬ﻫﺎ ﺑﺴﺎﺩﮔﻲ ﺩﺭ ﺑﺮﺍﺑﺮ ﺍﻟﻜﺘﺮﻭﺍﺳﺘﺎﺗﻴﻚ ﺻﺪﻣﻪ ﻣﻲﺑﻴﻨﻨﺪ )ﺑﺎ ﺳﻮﺭﺍﺥ ﺷﺪﻥ ﻻﻳﻪ ﻋﺎﻳﻖ(‬ ‫ﻟﺬﺍ ﺑﺎﻳﺪ ﺑﻬﻨﮕﺎﻡ ﻧﺼﺐ ﻭ ﺣﻤﻞ ﻭ ﻧﻘﻞ ﺁﻧﻬﺎ ﺑﺪﻳﻦ ﻧﻜﺘﻪ ﺗﻮﺟﻪ ﻧﻤﻮﺩ ، ﺿﻤﻨﺎ ‪ VGSmax‬ﺑﺎﻳﺪ ﺭﻋﺎﻳﺖ ﺷﻮﺩ .‬ ‫ﹰ‬ ‫١‐ ﺑﺮﺍﻱ ﻣﻘﺎﺩﻳﺮ ‪ VDS‬ﻛﻮﭼﻚ ، ﺑﻌﻠﺖ ﻋﻤﻠﻜﺮﺩ ﺷﺒﻪ ﻣﻘﺎﻭﻣﺘﻲ ﻛﺎﻧﺎﻝ ﻫﺪﺍﻳﺖ، ﺗﻐﻴﻴﺮﺍﺕ ‪ ID‬ﺑﺎ ‪ VDS‬ﺗﻘﺮﻳﺒﺎ‬ ‫ﹰ‬ ‫ﺧﻄﻲ ﺑﻮﺩﻩ ﻭ ﻟﺬﺍ ﺗﺮﺍﻧﺰﻳﺴﺘﻮﺭ ﺑﺼﻮﺭﺕ ﻣﻘﺎﻭﻣﺘﻲ ﻋﻤﻞ ﺧﻮﺍﻫﺪ ﻧﻤﻮﺩ. ﺑﺎ ﺍﻓﺰﺍﻳﺶ‪ ) VGS‬ﻭ ﺍﻓﺰﺍﻳﺶ ﺣﺎﺻﻠﻪ‬ ‫ﺩﺭ ﻋﺮﺽ ﻛﺎﻧﺎﻝ ‪ n‬ﭘﺪﻳﺪ ﺁﻣﺪﻩ( ﻣﻘﺎﻭﻣﺖ ﻛﺎﻫﺶ ﺧﻮﺍﻫﺪ ﻳﺎﻓﺖ.‬ ‫)‪(Drain‬‬ ‫6+‪VGS=VT‬‬ ‫ﻛﺎﻫﺶ‬ ‫ﻣﻘﺎﻭﻣﺖ‬ ‫‪ID‬‬ ‫‪VS+VDS‬‬ ‫ﺍﻓﺖ ﻭﻟﺘﺎﮊ 4‬ ‫3‬ ‫ﺩﺭ ﺟﻬﺖ‬ ‫2‬ ‫ﺟﺮﻳﺎﻥ ‪1 ID‬‬ ‫4+‪VGS=VT‬‬ ‫2+‪VGS=VT‬‬ ‫)‪VDS(mv‬‬ ‫‪E‬‬ ‫ﺑﻌﺒﺎﺭﺗﻲ ﻛﺎﻧﺎﻝ ﻫﺪﺍﻳﺖ ﺑﻴﻦ ‪ S‬ﻭ ‪D‬ﺩﺍﺭﺍﻱ ﻳﻚ ﻣﻘﺎﻭﻣﺖ ﺍﻟﻜﺘﺮﻳﻜﻲ ﺑﻮﺩﻩ ﻭ‬ ‫ﻟﺬﺍ ﺑﺮﺍﻱ ﻣﻘﺎﺩﻳﺮ ﻛﻮﭼﻚ ‪ VDS‬ﻭ ﺩﺭ ﺍﺯﺍﺀ ﻳﻚ ‪ VGS‬ﺛﺎﺑﺖ :‬ ‫‪VDS‬‬ ‫.‪= Const‬‬ ‫‪ID‬‬ ‫ﻭ ﻭﻟﺘﺎﮊ ﺩﺭ ﻃﻮﻝ ﻛﺎﻧﺎﻝ ﺍﺯ‪ Source‬ﺑﻪ ‪ Drain‬ﺍﻓﺰﺍﻳﺶ ﻣﻲ ﻳﺎﺑﺪ.‬ ‫‪VS‬‬ ‫‪n‬‬ ‫‬‫‬‫‬‫‬‫-‬ ‫‪n‬‬ ‫‪ID‬‬ ‫‪4V‬‬ ‫)‪(Gate‬‬ ‫‪5V‬‬ ‫‪0V‬‬ ‫)‪(source‬‬ ‫۲ ‐ ﺑﻌﻠﺖ ﻋﺒﻮﺭ ﺟﺮﻳﺎﻥ ‪ ID‬ﺩﺭ ﻛﺎﻧﺎﻝ‪ ) n‬ﺗﺸﻜﻴﻞ ﻳﺎﻓﺘﻪ ﺑﻴﻦ ﺗﺮﻣﻴﻨﺎﻝ ‪ D‬ﻭ ‪ ( S‬؛ ﻭﻟﺘﺎﮊ ﺩﺭ ﻃﻮﻝ ﻛﺎﻧﺎﻝ )ﺍﺯ‬ ‫‪Source‬ﺑﻪ ‪ (Drain‬ﺍﻓﺰﺍﻳﺶ ﻣﻲﻳﺎﺑﺪ. ﺑﻪ ﻫﻤﻴﻦ ﺗﺮﺗﻴﺐ ﻭﻟﺘﺎﮊ ﺑﻴﻦ ‪ Gate‬ﻭ ﻧﻘﺎﻁ ﻣﺨﺘﻠﻒ ﻛﺎﻧﺎﻝ‬ ‫ﻣﺘﻔﺎﻭﺕ ﺑﻮﺩﻩ ﻭ ‪ ) VGC‬ﻭﻟﺘﺎﮊ ﺑﻴﻦ ﮔﻴﺖ ﻭ ﻛﺎﻧﺎﻝ( ﺩﺭ ﻃﻮﻝ ﻛﺎﻧﺎﻝ )ﺍﺯ ‪ S‬ﺑﻪ ‪ (D‬ﻛﺎﻫﺶ ﻣﻲﻳﺎﺑﺪ ﺯﻳﺮﺍ‬ ‫ﻛﻪ‬ ‫)‪(Drain‬‬ ‫‪VGC= VGS+VSC = VGS - VCS‬‬ ‫ﺍﻓﺰﺍﻳﺶ ﺩﺭ ﻃﻮﻝ ﻛﺎﻧﺎﻝ ﺍﺯ ‪ S‬ﺑﻪ‪D‬‬ ‫‪n VS+VDS‬‬ ‫ﻛﺎﻫﺶ ﺩﺭ ﻃﻮﻝ ﻛﺎﻧﺎﻝ ﺍﺯ ‪ S‬ﺑﻪ‪D‬‬ ‫ﺍﺯ ﺁﻧﺠﺎﺋﻴﻜﻪ ‪ VGC‬ﺗﻌﻴﻴﻦ ﻛﻨﻨﺪﻩ ﺷﺪﺕ ﻣﻴﺪﺍﻥ ﺍﻟﻜﺘﺮﻳﻜﻲ ﺍﺳﺖ، ﻟﺬﺍ‬ ‫ﻣﻴﺪﺍﻥ ﺍﻟﻜﺘﺮﻳﻜﻲ ﺩﺭ ﻃﻮﻝ ﻛﺎﻧﺎﻝ )ﺍﺯ ‪ S‬ﺑﻪ‪ ( D‬ﺿﻌﻴﻒ ﺗﺮ ﮔﺮﺩﻳﺪﻩ ﻭ ﺩﺭ‬ ‫ﻧﺰﺩﻳﮑﯽ ‪ Drain‬ﻋﺮﺽ ﮐﺎﻧﺎﻝ ﺑﻪ ﮐﻤﺘﺮﻳﻦ ﻣﻘﺪﺍﺭ ﺧﻮﺩ ﻣﻴﺮﺳﺪ. ﺍﮔﺮ‬ ‫‪ε‬‬ ‫ﺍﻓﺖ ﻭﻟﺘﺎﮊ 4‬ ‫ﺩﺭ ﺟﻬﺖ 3‬ ‫ﺟﺮﻳﺎﻥ ‪2 I‬‬ ‫‪D‬‬ ‫1‬ ‫‪VS‬‬ ‫‪ VGD<VT‬ﮔﺮﺩﺩ، ﻛﺎﻧﺎﻝ ﺩﺭ ﻧﺰﺩﻳﻜﻲ ‪ drain‬ﻣﺴﺪﻭﺩ ﺷﺪﻩ ﻭ‬ ‫‪VDS >VGS -VT‬‬ ‫‪VGD=VGS+VSD‬‬ ‫‪VGD<VT‬‬ ‫‪n‬‬ ‫)‪(Gate‬‬ ‫‪5V‬‬ ‫‪0V‬‬ ‫)‪(source‬‬ ‫ﺗﺮﺍﻧﺰﻳﺴﺘﻮﺭ ﺍﺷﺒﺎﻉ ﺧﻮﺍﻫﺪ ﺷﺪ. ﻟﺬﺍ ﺷﺮﻁ ﺍﺷﺒﺎﻉ ﺭﺍ ﻣﻲﺗﻮﺍﻥ ﺑﺪﻳﻦ‬ ‫ﺻﻮﺭﺕ ﻧﻮﺷﺖ:‬ ‫‬‫‬‫‬‫-‬ ‫‪ID‬‬ ‫‪4V‬‬ ‫:ﺷﺮﻁ ﺍﺷﺒﺎﻉ‬ ‫ﺍﮔﺮ ‪ VGS‬ﺭﺍ ﺛﺎﺑﺖ ﻧﮕﻬﺪﺍﺷﺘﻪ ﻭ ﻣﻘﺪﺍﺭ 0>‪ VDS‬ﺭﺍ ﺍﻓﺰﺍﻳﺶ ﺩﻫﻴﻢ، ﺟﺮﻳﺎﻥ ‪ ID‬ﺍﻓﺰﺍﻳﺶ ﻳﺎﻓﺘﻪ ﺗﺎ ﺍﻳﻨﻜﻪ ﺩﺭ‬ ‫‪)VDS >VGS –VT‬ﺑﻌﻠﺖ ﭘﺪﻳﺪﻩ ﺍﺷﺒﺎﻉ .....ﺑﺮ ﺍﺛﺮ ﻣﻜﺎﻧﻴﺰﻣﻲ ﻣﺸﺎﺑﻪ ‪ Choking‬ﺩﺭ ﺍﻭﺭﻳﻔﻴﺴﻬﺎ( ﺟﺮﻳﺎﻥ‬ ‫ﺑﻪ ﻣﻘﺪﺍﺭ ﺛﺎﺑﺖ ﺍﺷﺒﺎﻉ ﻣﻲﺭﺳﺪ.‬ ‫ﺳﻄﺢ ﺍﺷﺒﺎﻉ‬ ‫ﺍﻓﺰﺍﻳﺶ ﻣﻘﺎﻭﻣﺖ ﺑﻪ ﺩﻟﻴﻞ‬ ‫ﺑﺎﺭﺭﻳﻚ ﺷﺪﻥ ﻛﺎﻧﺎﻝ‬ ‫‪ID‬‬ ‫‪IDSS‬‬ ‫‪VP=Pinch off voltage =VGS-VT‬‬ ‫‪VDS‬‬ ‫ﺑﺮﺍﻱ ‪ VDS>VP‬ﺑﺎ ﺗﻮﺟﻪ ﺑﻪ ﺛﺎﺑﺖ ﺑﻮﺩﻥ ﺟﺮﻳﺎﻥ‪ ، Drain‬ﺗﺮﺍﻧﺰﻳﺴﺘﻮﺭ ﻫﻤﺎﻧﻨﺪ ﻳﻚ ﻣﻨﺒﻊ ﺟﺮﻳﺎﻥ ﻋﻤﻞ ﻣﻲﻧﻤﺎﻳﺪ‬ ‫) ‪. (ID = IDSS = Constant‬‬ ‫ﻣﺸﺨﺼﻪ ‪ ID v.s. VDS‬ﺩﺭ ﻧﺎﺟﻴﻪ ﻣﻘﺎﻭﻣﺘﻲ ﻭ ﺩﺭ ﺍﺯﺍﺀ ﺗﻐﻴﻴﺮﺍﺕ ‪ VGS‬ﺑﺎ ﺭﺍﺑﻄﻪ ﺯﻳﺮ‬ ‫ﺗﻮﺻﻴﻒ ﻣﻲﺷﻮﺩ )ﻣﺒﺘﻨﯽ ﺑﺮ ﻓﻴﺰﻳﮏ ﻧﻴﻤﻪ ﻫﺎﺩﻳﻬﺎ( :‬ ‫]‬ ‫[‬ ‫2‬ ‫‪I D = K 2 (V GS − V T )V DS − V DS‬‬ ‫)‪VGS(th‬‬ ‫ﺑﺮﺍﻱ ﻣﺤﺎﺳﺒﻪ ﺟﺮﻳﺎﻥ ﺍﺷﺒﺎﻉ )ﺣﺪﺍﻛﺜﺮ ﺟﺮﻳﺎﻥ ‪ ( ID‬ﺑﻪ ﺍﺯﺍﺀ ﻣﻘﺎﺩﻳﺮ ﻣﺨﺘﻠﻒ ، ‪ VGS‬ﻛﺎﻓﻴﺴﺖ ﻛﻪ ﺩﺭ ﺭﺍﺑﻄﻪ‬ ‫ﻓﻮﻕ ﺑﺠﺎﻱ ‪ VDS‬ﻣﻘﺪﺍﺭ ‪) VDS=VGS-VT‬ﺷﺮﻁ ﺁﺳﺘﺎﻧﻪ ﺍﺷﺒﺎﻉ( ﺭﺍ ﻗﺮﺍﺭ ﺩﻫﻴﻢ :‬ ‫2 ) ) ‪I D = K (V GS − V Th ) 2 or k (V GS − V GS ( th‬‬ ‫)‪ID (sat‬‬ ‫2)‪ID=K(VGS-VT‬‬ ‫ﻣﻌﺎﺩﻟﻪ ﻓﻮﻕ ﺑﻌﻨﻮﺍﻥ ﻣﻌﺎﺩﻟﻪ ﺷﻮﻛﻠﻲ ﺷﻨﺎﺧﺘﻪ ﻣیﺸﻮﺩ.‬ ‫‪VT‬‬ ‫‪VG S‬‬ ‫ﺑﺮﺍﻱ ﻣﺤﺎﺳﺒﻪ ‪ k‬ﻣﻌﻤﻮﻻ ﺍﺯ ﻣﺸﺨﺼﻪﻫﺎﻱ ﺩﺍﺩﻩ ﺷﺪﻩ ﺗﺮﺍﻧﺰﻳﺴﺘﻮﺭ ﺩﺭ ﺣﺎﻟﺖ ﺭﻭﺷﻦ)‪ ) (ON‬ﻳﻚ ﻧﻘﻄﻪ ﻛﺎﺭﻱ‬ ‫ﹰ‬ ‫ﻣﺸﺨﺺ ﺩﺍﺩﻩ ﺷﺪﻩ ﺗﻮﺳﻂ ﺳﺎﺯﻧﺪﻩ( ﻳﻌﻨﻲ )‪ ( VDS≥VGS(ON)-VT ) VGS (ON) ، ID(ON‬ﺍﺳﺘﻔﺎﺩﻩ‬ ‫ﻣﻲﺷﻮﺩ:‬ ‫) ‪I D ( ON‬‬ ‫2 ) ) ‪(V GS ( ON ) − V GS ( th‬‬ ‫=‪K‬‬ ‫ﺑﺎ ﺗﻮﺟﻪ ﺑﻪ ﻣﻮﺍﺭﺩ ﺫﮐﺮ ﺷﺪﻩ ﻣﻨﺤﻨﻲ ﻣﺸﺨﺼﻪ )ﻧﻤﻮﻧﻪ( ﺑﺮﺍﻱ ﻳﻚ ﺗﺮﺍﻧﺰﻳﺴﺘﻮﺭ ‪ MOSFET‬ﺍﻓﺰﺍﻳﺸﻲ‬ ‫)ﻧﻮﻉ ‪ n‬ﻛﺎﻧﺎﻝ( ﻣﻄﺎﺑﻖ ﺷﮑﻞ ﺯﻳﺮ ﺣﻮﺍﻫﺪ ﺑﻮﺩ:‬ ‫ﻧﺎﺣﻴﻪ ﺍﺷﺒﺎﻉ‬ ‫‪VDS>VGS-VT‬‬ ‫ﻧﺎﺣﻴﻪ ﻣﻘﺎﻭﻣﺘﻲ‬ ‫‪VDS<VGS-VT‬‬ ‫‪ON state‬‬ ‫‪VGS=8 V‬‬ ‫‪ID‬‬ ‫‪ID‬‬ ‫6 = 2-8 = ‪VDS=VGS-VT‬‬ ‫‪VGS=7 V‬‬ ‫‪VGS=6 V‬‬ ‫5 = 2-7 =‪VDS‬‬ ‫‪VGS=4 V‬‬ ‫‪Off state‬‬ ‫‪VDS‬‬ ‫4=2-6 =‪VDS‬‬ ‫6‬ ‫42‬ ‫ﻧﺎﺣﻴﻪ ﻗﻄﻊ‬ ‫‪: VGS<VT=2V‬‬ ‫)‪(Cutoff region‬‬ ‫‪2 4 6 8 VGS‬‬ ‫ﺗﺤﻠﻴﻞ ‪ DC‬ﻭ ﻣﺪﺍﺭﻫﺎﯼ ﺑﺎﻳﺎﺱ ‪ MOSFET‬ﻫﺎ:‬ ‫• ﺭﻭﺍﺑﻂ ﺣﺎﻛﻢ ﺑﺮﺍﻱ ﺗﺤﻠﻴﻞ ‪ dc‬ﺗﺮﺍﻧﺰﻳﺴﺘﻮﺭﻫﺎﻱ ‪ ) MOSFET‬ﻧﻮﻉ ﺍﻓﺰﺍﻳﺸﻲ( ﻋﺒﺎﺭﺗﻨﺪ ﺍﺯ‬ ‫‪ID = IS‬‬ ‫) ‪I D ( ON‬‬ ‫2 ) ) ‪(V GS ( ON ) − V GS ( th‬‬ ‫=‪; K‬‬ ‫2‬ ‫0 = ‪IG‬‬ ‫&‬ ‫) ‪I D Sat = K (V GS − V T‬‬ ‫• ﺑـﺮﺍﻱ ﺩﺳﺘﻴــﺎﺑﻲ ﺑﻪ ﻧﻘﻄﻪ ﻛﺎﺭﻱ ﻣﻄﻠﻮﺏ ) ‪ (IDQ, VDSQ‬ﺭﻭﺵﻫــﺎﻱ ﺗﻐﺬﻳﻪ ﻣﺘﻌﺪﺩﻱ ﻭﺟﻮﺩ ﺩﺍﺭﻧﺪ.‬ ‫ﻣﺜﺎﻝ : ﺗﻐﺬﻳﻪ ﺑﺎ ﻣﻘﺴﻢ ﻭﻟﺘﺎﮊ ﺑﺮﺍﻱ ‪ MOSFET‬ﻫﺎﻱ ﺍﻓﺰﺍﻳﺸﻲ‬ ‫‪VDD‬‬ ‫‪ID‬‬ ‫‪IS‬‬ ‫‪RD‬‬ ‫‪RS‬‬ ‫ﻣﺪار ﻣﻌﺎدل‬ ‫‪RD‬‬ ‫‪RTh‬‬ ‫‪G‬‬ ‫‪D‬‬ ‫‪S‬‬ ‫‪VTh‬‬ ‫0 = ‪IG‬‬ ‫‪RD‬‬ ‫‪D‬‬ ‫2‪R‬‬ ‫‪V DD‬‬ ‫2 ‪R1 + R‬‬ ‫= ‪V th = V G‬‬ ‫2 ‪R1R‬‬ ‫2 ‪R1 + R‬‬ ‫= ‪R th‬‬ ‫‪S‬‬ ‫‪G‬‬ ‫‪RS‬‬ ‫1‪R‬‬ ‫2‪R‬‬ ‫ﺑﺎ ﺗﻮﺟﻪ ﺑﻪ ﺍﻣﭙﺪﺍﻧﺲ ﺑﺴﻴﺎﺭ‬ ‫ﺑﺎﻻﻱ ‪ MOSFET‬ﻫﺎ‬ ‫) 0=‪ R1 (IG‬ﻭ 2‪R‬‬ ‫ﻣﻲﺗﻮﺍﻧﻨﺪ ﺩﺭ ﻣﺤﺪﻭﺩﻩ ﻣﮕﺎ‬ ‫ﺍﻫﻢ ﻭ ﺑﺎﻻﺗﺮ ﺑﺎﺷﺪ‬ : ( ‫ ﺣﻠﻘﻪ ﮔﻴﺖ ﺳﻮﺭﺱ ) ﻣﺸﺎﺑﻪ ﺣﻠﻘﻪ ﺑﻴﺲ ﺍﻣﻴﺘﺮ‬dc ‫ﺗﺤﻠﻴﻞ‬ VGSQ ‫ ﻭ‬IDQ ‫ﺑﺮﺍﻱ ﺗﻌﻴﻴﻦ ﺑﺎﻳﺎﺱ ﻭ ﻣﺤﺎﺳﺒﻪ‬ V th − R th I G − V GS − R S I S = 0 KVL on Gate-Source Loop: 0 ‫ﺣﻞ ﺗﺮﺳﻴﻤﻲ‬ IDQ ‫ﺑﺮﺍﻱ‬ V GS = V th − R S I D I D = K (V GS − VT ) 2 ‫ ﺑﻪ ﺗﻐﻴﻴﺮﺍﺕ ﺩﺭ ﻣﺸﺨﺼﻪ ﺗﺮﺍﻧﺰﻳﺴﺘﻮﺭ‬IDQ ‫ﺑﺮﺍﻱ ﻛﺎﻫﺶ ﺣﺴﺎﺳﻴﺖ‬ .‫( ﺑﺎﻳﺪ ﺷﻴﺐ ﺧﻂ ﺑﺎﺭ ﻛﺎﻫﺶ ﺩﺍﺩﻩ ﺷﻮﺩ‬K ‫ﻭ‬VT ‫)ﻣﺎﻧﻨﺪ‬ ID Vth/ RS IDQ max IDQ min VGS= VTh-RS ID Max. Curve Min. Curve ID=K(VGS-VT )2 VT VGSQ Vth VGS :(‫ ﺣﻠﻘﻪ ﺩﺭﻳﻦ ﺳﻮﺭﺱ )ﻣﺸﺎﺑﻪ ﻛﻠﻜﺘﻮﺭ ﺍﻣﻴﺘﺮ‬dc ‫ﺗﺤﻠﻴﻞ‬ ID V DD RD + RS ‫ﺧﻂ ﺑﺎﺭ‬ VGS1 VGS2 VGSQ IDQ VDSQ VDD VDS : VDSQ ‫ﺑﺮﺍﻱ ﺗﻌﻴﻴﻦ ﻣﻌﺎﺩﻟﻪ ﺧﻂ ﺑﺎﺭ ﻭ‬ VDD − RD I D − VDS − RS I D = 0 V DS = V DD − ( R D + R S ) I D V DSQ = V DD − ( R D + R S ) I DQ ‫ﻣﻌﺎﺩﻟﻪ ﺧﻂ ﺑﺎﺭ‬ ‫ﻣﺸﺨﺼﻪﻫﺎﻱ ‪ ac‬ﺑﺮﺍﻱ ‪ MOSFET‬ﻫﺎﻱ ﻧﻮﻉ ﺍﻓﺰﺍﻳﺸﻲ‬ ‫ﺳﻪ ﻣﺸﺨﺼﻪ ﺍﺻﻠﻲ ﺗﺮﺍﻧﺰﻳﺴﺘﻮﺭﻫﺎﻱ ‪ MOSDET‬ﺍﻓﺰﺍﻳﺸﻲ ﻋﺒﺎﺭﺗﻨﺪ ﺍﺯ‬ ‫∞ = ‪MΩ‬‬ ‫4‬ ‫01 ≥‬ ‫ﻣﻘﺎﻭﻣﺖ ﺑﻴﻦ ﮔﻴﺖ ﻭ ﺳﻮﺭﺱ = ‪RGS‬‬ ‫ﻣﻘﺪﺍﺭ ﻣﻌﻤﻮﻝ ‪ RGS‬ﺣﺪﻭﺩ ‪ ١٠ ٨ MΩ‬ﻣﻲ ﺑﺎﺷﺪ.‬ ‫‪ID‬‬ ‫‪IDQ‬‬ ‫‪Slope=gm‬‬ ‫‪VGSQ V‬‬ ‫‪GS‬‬ ‫‪dI D‬‬ ‫2 ) ‪I D = k (VGS −VT‬‬ ‫= ‪gm‬‬ ‫) ‪⎯⎯ ⎯ ⎯ ⎯⎯→ g m = 2k (VGS − VT‬‬ ‫‪dVGS‬‬ ‫‪VT‬‬ ‫‪I D,I S‬‬ ‫‪VGSQ‬‬ ‫‪Slope=1/rds‬‬ ‫1−‬ ‫‪Dynamic resistance‬‬ ‫⎤ ‪⎡ di D‬‬ ‫⎢ = ‪ro ≅ rds = between Drain and Source‬‬ ‫⎥‬ ‫⎦ ‪⎣ dv DS‬‬ ‫‪V GSQ‬‬ ‫)‪(in the active region‬‬ ‫‪VDS‬‬ ‫‪ ro‬ﻳﺎ ‪ rds‬ﻳﺎ ﺑﺼﻮﺭﺕ ﻣﺴﺘﻘﻴﻢ ) ﺩﺭ ﻳﻚ ﻧﻘﻄﻪ ﻛﺎﺭﻱ ‪ (VGSQ‬ﺩﺍﺩﻩ ﻣﻲﺷﻮﺩ ﻳﺎ‬ ‫2)‬ ‫ﺗﻮﺳﻂ ﭘﺎﺭﺍﻣﺘﺮ ﺛﺎﺑﺖ ﺩﻳﮕﺮﻱ ‪ λ‬ﻗﺎﺑﻞ ﻣﺤﺎﺳﺒﻪ ﺍﺳﺖ. ﺑﺮ ﺍﺳﺎﺱ ﺷﻜﻞ ﻣﻘﺎﺑﻞ‬ ‫‪I D=k(VGS-VT‬‬ ‫‪ID‬‬ ‫ﻣﻲﺗﻮﺍﻥ ﻧﺸﺎﻥ ﺩﺍﺩ ﻛﻪ )ﺩﺭ ﺻﻮﺭﺕ ﺻﺮﻑ ﻧﻈﺮ ﺍﺯ ﻣﻘﺪﺍﺭ ‪ γ‬ﺩﺭ ﺷﻜﻞ .…ﺑﺎ ﺗﻮﺣﻪ ﺑﻪ‬ ‫‪γ‬‬ ‫ﺷﻴﺐ ﻛﻢ ﺧﻄﻮﻁ(‬ ‫ﺟﺮﻳﺎﻥ ﺩﺭﻳﻦ ﺩﺭ‬ ‫ﻧﺎﺣﻴﻪ ﺍﺷﺒﺎﻉ‬ ‫) ‪I D ≈ K (V GS − V T ) 2 (1 + λ V DS‬‬ ‫‪V‬‬ ‫1‬ ‫‪DS‬‬ ‫‪λ‬‬ ‫1‬ ‫= ‪Channel Mo dulation Voltage‬‬ ‫‪λ‬‬ ‫−‬ ro ≅ rds = ( [ dI D −1 ) = λ k (V GS − V T ) 2 dV DS −1 = ( λ I D ) −1 ‫ ﺭﺍ‬λ ‫ ﺑﺮﺍﻱ ﻣﺜﺎﻝ( ﺁﻧﮕﺎﻩ ﻣﻲﺗﻮﺍﻥ ﺍﺯ ﺭﺍﺑﻄﻪ ﻓﻮﻕ‬VGS(ON) ‫ ﺩﺭ ﻳﻚ ﻧﻘﻄﻪ ﻛﺎﺭﻱ ﺩﺍﺩﻩ ﺷﺪﻩ ﺑﺎﺷﺪ )ﺑﺮﺍﻱ‬rds ‫ﺍﮔﺮ‬ .‫ﻣﺤﺎﺳﺒﻪ ﻧﻤﻮﺩ‬ Gate Drain : MOSFET‫ﻣﺪﻝ ﺳﻴﮕﻨﺎﻝ ﻛﻮﭼﻚ ﺑﺮﺍﻱ‬ rds gmVgs Source Zout, Zin, Av‫ﻣﺜﺎﻝ )ﺗﻤﺮﻳﻦ( : ﻣﻄﻠﻮﺑﺴﺖ‬ VDD RD Vi RG G D S Vo AV = (1 − g m R G )( R D rds ) R G + R D rds Zi = RG 1 + g m ( R D rd ) Z o = R D rds ‫•ﺗﺮﺍﻧﺰﻳﺴﺘﻮﺭﻫﺎﻱ ‪ MOSFET‬ﺍﻓﺰﺍﻳﺸﻲ ‪ P‬ﻛﺎﻧﺎﻝ‬ ‫ﺩﺭ ﺗﺮﺍﻧﺰﻳﺴﺘﻮﺭﻫﺎﻱ ‪ MOSFET‬ﻛﺎﻧﺎﻝ ، ‪ P‬ﺟﻬﺖ ﺟﺮﻳﺎﻧﻬﺎ ﻭ ﭘﻼﺭﻳﺘﻪ ﻭﻟﺘﺎﮊﻫﺎ ﻣﻌﻜﻮﺱ ﺗﺮﺍﻧﺰﻳﺴﺘﻮﺭﻫﺎﻱ‬ ‫ﻛﺎﻧﺎﻝ ‪ n‬ﻣﻲﺑﺎﺷﺪ:‬ ‫5-‪VGS=-VT‬‬ ‫‪D‬‬ ‫‪ID‬‬ ‫‪ID‬‬ ‫2-‪VGS=-VT‬‬ ‫1-‪VGS=-VT‬‬ ‫‪VT VGS‬‬ ‫‪VDS‬‬ ‫ﺗﺮﺍﻧﺰﻳﺴﺘﻮﺭ ‪ P‬ﻛﺎﻧﺎﻝ) ‪( PMOS‬‬ ‫‪D‬‬ ‫‪G‬‬ ‫‪S‬‬ ‫‬‫‪ID‬‬ ‫+‬ ‫‪VGS=-VT‬‬ ‫‪MOSFET‬‬ ‫‪D‬‬ ‫‪G‬‬ ‫‪S‬‬ ‫ﻧﻮﻉ ﻛﺎﻧﺎﻝ‪p‬‬ ‫)‪(PMOS‬‬ ‫‪G‬‬ ‫‪S‬‬ ‫+‪D‬‬ ‫‪ID‬‬ ‫‪G‬‬ ‫‪S‬‬‫ﻧﻮﻉ ﻛﺎﻧﺎﻝ‪n‬‬ ‫)‪(NMOS‬‬ ‫ﺗﺮﺍﻧﺰﻳﺴﺘﻮﺭ ‪ n‬ﻛﺎﻧﺎﻝ)‪(NMOS‬‬ ‫0 ≤ ‪V DS‬‬ ‫0 ≥ ‪V DS‬‬ ‫‪V GS < V T‬‬ ‫0 > ‪V GS > V T , V T‬‬ ‫‪I D out of the Drain‬‬ ‫‪I D into the Drain‬‬ ‫0 < ‪; VT‬‬ ‫ﺷﺮﻁ ﺭﻭﺷﻦ ﺷﺪﻥ‬ VGS>|VT| VGS>|VT| -|VT| <VGS<0 VGS<|VT| -|VT| <VGS<0 Cox:MOSFET Capacitance per unit area µ:Mobility of electrons VGS<-|VT| 0 <VGS<|VT| 0 <VGS<|VT| L:Channel Length W:Channel Width ‫• ﺳﻮﺋﻴﭻﻫﺎﻱ‪FET‬‬ ‫ﻳﻜﻲ ﺍﺯ ﻣﻬﻤﺘﺮﻳﻦ ﻛﺎﺭﺑﺮﺩﻫﺎﻱ ‪ FET‬ﻫﺎ ، ﺍﺳﺘﻔﺎﺩﻩ ﺍﺯ ﺁﻧﻬﺎ ﺩﺭ ﻋﻤﻠﻴﺎﺕ ﺳﻮﺋﻴﭽﻴﻨﮓ ﺍﺳﺖ. ﺑﺎ ﺗﻮﺟﻪ ﺑﻪ ﺣﺠﻢ ﻛﻤﻲ ﻛﻪ‬ ‫‪FET‬ﻫﺎ )ﺩﺭ ﻣﻘﺎﻳﺴﻪ ﺑﺎ ‪ BJT‬ﻫﺎ( ﺍﺷﻐــﺎﻝ ﻣﻲﻛﻨﻨﺪ ‪،FET‬ﺑﺨﺼﻮﺹ ‪ MOSFET‬ﻫـــﺎ ﻛـﺎﺭﺑﺮﺩ ﻭﺳﻴﻌﻲ ﺩﺭ‬ ‫ﻣﺪﺍﺭﻫﺎﻱ ﻣﺠﺘﻤﻊ ﺩﻳﺠﻴﺘﺎﻟﻲ ﻣﺎﻧﻨﺪ ﻣﻴﻜﺮﻭﭘﺮﻭﺳﺴﻮﺭﻫــﺎ، ﺣﺎﻓﻈﻪﻫﺎ ﻭ ﻏﻴﺮﻩ ﭘﻴﺪﺍ ﻛﺮﺩﻩﺍﻧﺪ .‬ ‫ﺑــﺎ ﻣﻌﺮﻓﻲ ‪ ( Vertical Metal Oxide Semiconductros) VMOS‬ﻛﻪ ﺩﺍﺭﺍﻱ ﻛﻠﻴﻪ ﻣﺸﺨﺼﻪﻫﺎﻱ‬ ‫ﻋﻤﻮﻣﻲ ﻣﺜﺒﺖ ‪ MOSFET‬ﻫﺎﻱ ﺍﻓﺰﺍﻳﺸﻲ ﺑﻮﺩﻩ ﻭ ﻋﻼﻭﻩ ﺑﺮ ﺁﻥ ﻗﺎﺩﺭ ﺑــﻪ ﺗﺄﻣﻴﻦ ﺗﻮﺍﻧﻬﺎﻱ ﺑﺎﻻﻳﻲ ﻧﻴﺰ ﻫﺴﺘﻨﺪ‬ ‫)‪MOSFET , (Power MOSFETS‬ﻫﺎ ﺟﺎ ﺧﻮﺩ ﺭﺍ ﺩﺭ ﻛﺎﺭﺑﺮﺩﻫﺎﻳﻲ ﻫﻤﭽﻮﻥ ﻣﺪﺍﺭﻫﺎﻱ ﻗﺪﺭﺕ ﺳﻮﺋﻴﭽﻴﻨﮓ‬ ‫)ﻛﻪ ﻣﻌﻤﻮﻻ ﺍﺯ ﺗﺮﺍﻧﺰﻳﺴﺘﻮﺭﻫﺎﻱ ‪ BJT‬ﺍﺳﺘﻔﺎﺩﻩ ﻣﻲﺷﻮﺩ( ﻧﻴﺰ ﺑﺎﺯ ﻧﻤﻮﺩﻩ ﺍﻧﺪ‬ ‫ﹰ‬ ‫ﺳﺎﺧﺖ ﺳﻮﺋﻴﭻﻫﺎﻱ ‪ FET‬ﺑﺎ ﻫﺮ ﻳﻚ ﺍﺯ ﺍﻧﻮﺍﻉ ﺗﺮﺍﻧﺰﻳﺴﺘﻮﺭﻫﺎﻱ ‪ FET‬ﺍﻣﻜﺎﻥﭘﺬﻳﺮ ﺍﺳﺖ ﻭ ﻓﻘــﻂ ﺟﻬﺖ ﻭﭘﻼﺭﻳﺘﻪ‬ ‫ﺟﺮﻳﺎﻧﻬﺎ ﻭ ﻭﻟﺘﺎﮊﻫﺎ ﻣﺘﻔﺎﻭﺕ ﺧﻮﺍﻫﺪ ﺑﻮﺩ. ﺩﺭ ﺍﻳﻨﺠﺎ ﺑﻪ ﺗﺸﺮﻳــﺢ ﻮﺋﻴﭻﻫﺎﻱ ‪MOSFET‬ﻣﻲﭘﺮﺩﺍﺯﻳﻢ.‬ ‫‪VDD‬‬ ‫ﻣﺪﺍﺭ ﻧﺸﺎﻥ ﺩﺍﺩﻩ ﺷﺪﻩ ﺩﺭ ﺷﻜﻞ ﻣﻘﺎﺑﻞ ﺭﺍ ﺩﺭ ﻧﻈﺮ ﺑﮕﻴﺮﻳﺪ. ﻣﻌﺎﺩﻟﻪ ﺧﻂ ﺑﺎﺭ ﺑﺎ‬ ‫‪ID=IL‬‬ ‫ﻧﻮﺷﺘﻦ ‪ KVL‬ﺑﺮ ﺭﻭﻱ ﺣﻠﻘﻪ ﺩﺭﻳﻦ، ﺳﻮﺭﺱ ﺣﺎﺻﻞ ﻣﻲﺷﻮﺩ :‬ ‫0 = ‪V DD − R L I D − V DS‬‬ ‫‪V DS = V DD − R L I D‬‬ ‫‪D‬‬ ‫‪RL‬‬ ‫-‬ ‫‪S‬‬ ‫+‬ ‫‪Vin‬‬ ‫‪G‬‬ ‫ﻧﻘﻄﻪ ﻛﺎﺭﻱ ﺩﺭ ﺗﻘﺎﻃﻊ ﺧﻂ ﺑﺎﺭ ﺑﺎ ﻣﻨﺤﻨﻲﻫﺎﻱ ﻣﺸﺨﺼﻪ ‪ ID V.S. VDS‬ﺑﺪﺳﺖ ﻣﻲﺁﻳﺪ :‬ ‫ﺩﺭ ﺻﻮﺭﺗﻴﻜﻪ ‪ VGS=Vin<VT‬ﺑﺎﺷﺪ‬ ‫‪VDS≈VDD‬ﻭ ﺗﺮﺍﻧﺰﻳﺴﺘــﻮﺭ ﻣﺎﻧﻨﺪ ﻳﻚ‬ ‫ﺳﻮﺋﻴﭻ ﺑﺎﺯ ﻋﻤﻞ ﺧﻮﺍﻫﺪ ﻧﻤﻮﺩ)0=‪(IL‬‬ ‫ﻣﺪﺍﺭ‬ ‫ﻣﻌﺎﺩﻝ‬ ‫‪VDD‬‬ ‫‪RL‬‬ ‫‪D‬‬ ‫‪S‬‬ ‫‪ID‬‬ ‫‪VGS=Von‬‬ ‫‪VDS=VDD-RLID‬‬ ‫2‪Q‬‬ ‫‪V DD‬‬ ‫‪RL‬‬ ‫‪VGS=VT‬‬ ‫‪VDS‬‬ ‫‪VDS(ON) VDD‬‬ ‫ﺩﺭ ﺻﻮﺭﺗﻴﻜﻪ ‪ VGS=Vin=Von‬ﺑﺎﺷﺪ ﻧﻘﻄﻪ ﻛﺎﺭﻱ ﺑﺪﺳﺖ ﺁﻣﺪﻩ ﻧﻘﻄﻪ ‪ Qon‬ﺑﻮﺩﻩ ﻭ‬ ‫)‪VDS=VDS(on‬ﻭ ﺗﺮﺍﻧﺰﻳﺴﺘــﻮﺭ ﻣﺎﻧﻨﺪ ﺳﻮﺋﻴﭻ ﺑﺴﺘﻪ )ﺑـﺎ ﺍﻓﺖ ﻭﻟﺘـــﺎﮊ )‪(VDS(on‬‬ ‫ﻋﻤــﻞ ﺧﻮﺍﻫﺪ ﻧﻤﻮﺩ. ﺑﺪﻳﻬﻲ ﺍﺳﺖ ﻛﻪ ﻫﺮ ﭼﻪ ﻣﻘــﺪﺍﺭ ‪ Vin‬ﺑﺰﺭﮔـﺘﺮ ﺑﺎﺷﺪ، ﻣﻴﺰﺍﻥ ﺍﻓﺖ‬ ‫ﻭﻟﺘـﺎﮊ )ﻳﺎ ﻣﻘـﺎﻭﻣﺖ ﺧﻄــﻲ ﺗﺮﺍﻧﺰﻳﺴﺘﻮﺭ ‪ ( rds‬ﻛﻮﭼﻜﺘﺮ ﺧﻮﺍﻫﺪ ﺑﻮﺩ .‬ ‫‪Qon‬‬ ‫ﻣﺪﺍﺭ‬ ‫ﻣﻌﺎﺩﻝ‬ ‫‪VDD‬‬ ‫‪rds=VDS/ID‬‬ ‫‪RL‬‬ ‫‪D‬‬ ‫‪S‬‬ ‫• ﻛﺎﺭﺑﺮﺩﻫﺎﻱ ﻣﺨﺘﻠﻒ ‪ MOSFET‬ﻫﺎ )ﺑﻌﻨﻮﺍﻥ ﺳﻮﺋﻴﭻ (‬ ‫‪RL‬‬ ‫‪Vout‬‬ ‫‪D VCON >>VT‬‬ ‫)‪rds(on‬‬ ‫‪Vout‬‬ ‫‪RL‬‬ ‫‪RL‬‬ ‫‪V in‬‬ ‫‪R L + rds‬‬ ‫‪Vin‬‬ ‫ﻣﺪﺍﺭ ﻣﻌﺎﺩﻝ‬ ‫‪VCON<VT‬‬ ‫)‪rds(on‬‬ ‫‪Vout‬‬ ‫‪RL‬‬ ‫‪D‬‬ ‫‪S‬‬ ‫‪Vin‬‬ ‫+‬ ‫‪VCON=VGS‬‬ ‫‪G‬‬ ‫-‬ ‫ﻭﻟﺘﺎﮊ ﻛﻨﺘﺮﻝ‬ ‫‪) Shunt Switch‬ﺳﻮﺋﻴﭻ ﺷﺎﻧﺖ(‬ ‫‪VCON<VT‬‬ ‫‪Vin‬‬ ‫‪VCON >>VT‬‬ ‫‪S‬‬ ‫‪Vout‬‬ ‫ﻣﺪﺍﺭ ﻣﻌﺎﺩﻝ‬ ‫‪D‬‬ ‫‪Vin‬‬ ‫‪RL‬‬ ‫‪ VCON =VGS‬ﻭﻟﺘﺎﮊ ﻛﻨﺘﺮﻝ‬ ‫= ‪For VCON >>VT : V out‬‬ ‫‪) Series Switch‬ﺳﻮﺋﻴﭻ ﺳﺮﻱ(‬ ‫ﺩﺭ ﺳﻮﻳﭻ ﺳﺮﻱ ﻓﻮﻕ ، ﺑﺮﺍﻱ ﺍﻳﻨﻜﻪ ﺗﺮﺍﻧﺰﻳﺴﺘﻮﺭ ﺑــﺮﺍﻱ ‪ Vcon=high‬ﺑﺼﻮﺭﺕ ﺳﻮﺋﻴﭻ ﺑﺴﺘـﻪ ﺑﺎﻗﻲ ﺑﻤﺎﻧﺪ ﺑﺎﻳﺪ ﺩﺭﺗﻤـﺎﻡ‬ ‫ﻃﻮﻝ ﺳﻴﻜﻞ ﺳﻴﮕﻨﺎﻝ ﺧﺮﻭﺟﻲ ﻫﻤﻮﺍﺭﻩ ‪VGS>>VT‬ﺑﺎﻗﻲ ﺑﻤﺎﻧﺪ .ﻟﺬﺍ ﺑﺎﻳﺪ ‪ Vcon>Vin max +VT‬ﺑﺎﺷﺪ.‬ ‫ﺩﺭ ﻣﻮﺍﺭﺩ ﻓﻮﻕ ) ﻭ ﻛﻼ ﺩﺭ ﻛﺎﺭﺑﺮﺩﻫﺎﻱ ﺳﻮﺋﻴﭽﻴﻨﮓ( ﻫﺮﭼﻪ ‪ rds‬ﻛﻮﭼﻜﺘﺮ ﺍﺯ ‪ RL‬ﺑﺎﺷﺪ، ﺗﺮﺍﻧﺰﻳﺴﺘﻮﺭ ﺑﻪ ﻳﻚ ﺳﻮﺋﻴﭻ‬ ‫ﹰ‬ ‫ﺍﻳﺪﻩﺁﻝ ﻧﺰﺩﻳﻜﺘﺮ ﺧﻮﺍﻫﺪ ﺑﻮﺩ.‬ ‫ﻛﺎﺭﺑﺮﺩ ﺑﺮﺍﻱ ‪Multiplexing‬‬ ‫1‪V‬‬ ‫‪⎧ V1 if Vcon1 >> VT & Vcon 2 = Vcon 3 < VT‬‬ ‫⎪‬ ‫‪Vout = ⎨V2 if Vcon 2 >> VT & Vcon 2 = Vcon 3 < VT‬‬ ‫⎪‬ ‫‪RL ⎩V3 if Vcon 3 >> VT & Vcon 2 = Vcon 3 < VT‬‬ ‫2‪V‬‬ ‫3‪V‬‬ ‫3‪Vcon1 Vcon2 Vcon‬‬ ‫ﺗﻘﻮﻳﺖ ﻛﻨﻨﺪﻩ ‪Sample & hold‬‬ ‫ﺑﺎ ﺍﻋﻤﺎﻝ ﭘﺎﻟﺲ ‪Vcon‬ﺩﺭ ‪ t=tA‬ﺗﺮﺍﻧﺰﻳﺴﺘﻮﺭ ﺑﺼﻮﺭﺕ ﻳﻚ ﺍﺗﺼﺎﻝ ﻛﻮﺗﺎﻩ )ﺍﻟﺒﺘﻪ ﻣﻘﺎﻭﻣﺖ ‪ rds‬ﻓﺮﺍﻣﻮﺵ ﻧﺸﻮﺩ( ﺩﺭﺁﻣﺪﻩ ﻭ‬ ‫ﺧﺎﺯﻥ ‪ CH‬ﺭﺍ ﺷﺎﺭﮊ ﻣﻲﻧﻤﺎﻳﺪ )ﺍﻟﺒﺘﻪ ﺑﺎ ﺗﻮﺟﻪ ﺑﻪ ﻣﻘﺪﺍﺭ ‪ rds‬ﻋﺮﺽ ﭘﺎﻟﺲ ‪ Vcon‬ﺑﺎﻳﺪ ﺑﻪ ﺣﺪﻱ ﺑﺎﺷﺪ ﻛﻪ ﺧﺎﺯﻥ ﻓﺮﺻﺖ‬ ‫ﺷﺎﺭﮊ ﺷﺪﻥ ﺑﻪ ﻟﺘﺎﮊ ‪ Vin‬ﺭﺍ ﺩﺍﺷﺘﻪ ﺑﺎﺷﺪ( ﺑﺮﺍﻱ ﻧﻤﻮﻧﻪﺑﺮﺩﺍﺭﻱ ﺑﺎ ﺳﺮﻋﺖ ﺑﺎﻻ ‪ rds‬ﺑﺎﻳﺪ ﺧﻴﻠﻲ ﻛﻮﭼﻚ ﺑﺎﺷﺪ ﺯﻳﺮﺍ ﺛﺎﺑﺖ‬ ‫ﺯﻣﺎﻧﻲ ﺷﺎﺭﮊ ﺷﺪﻥ :‬ ‫‪τ ≈ rds C h‬‬ ‫‪Vin‬‬ ‫‪ID‬‬ ‫‪A‬‬ ‫‪t‬‬ ‫‪t‬‬ ‫‪Discharage due to RL‬‬ ‫‪t‬‬ ‫‪Vcon‬‬ ‫)‪VGS=(Vcon-Vout‬‬ ‫‪V in‬‬ ‫‪RL‬‬ ‫‪Vout‬‬ ‫‪A‬‬ ‫‪Voffset Vin VDS‬‬ ‫ﺧﻄﺎ‬ ‫‪Vout‬‬ ‫‪RL‬‬ ‫‪S‬‬ ‫‪Ch‬‬ ‫‪VCON‬‬ ‫‪Vin D‬‬ ‫‪ MOSFET‬ﻫﺎﻱ ﻗﺪﺭﺕ ﻳﻜﻲ ﺍﺯ ﺳﺎﺩﻩﺗﺮﻳﻦ ﺭﻭﺵﻫﺎﻱ‬ ‫ﺳﺎﺧﺖ ﻣﺪﺍﺭ ﺗﺤﺮﻳﻚ ﺑﺮﺍﻱ ﺭﻟــﻪﻫﺎ ﻣﺤﺴﻮﺏ ﻣﻲﺷﻮﻧﺪ. ﻣﻌﻤﻮﻻ‬ ‫ﹰ‬ ‫‪+12V‬‬ ‫‪M‬‬ ‫ﺗﺤﺮﻳﻚ ﺭﻟـﻪﻫﺎ ﺑﻪ ﺟﺮﻳﺎﻧﻲ ﺑﻴﻦ ‪ 10 mA‬ﺗﺎ ﺻﺪﻫﺎ ﻣﻴﻠﻲﺁﻣﭙﺮ‬ ‫ﻧﻴﺎﺯ ﺩﺍﺭﺩ ﻛﻪ ﺑﺎ ﺍﺗﺼﺎﻝ ﻣﺴﺘﻘﻴﻢ ﺁﻧﻬﺎ ﺑﺎ ‪ IC‬ﻫـــﺎﻱ ﺩﻳﺠﻴﺘﺎﻟﻲ‬ ‫)ﻭ ﻛﺎﻣﭙﻴﻮﺗﺮ( ﺍﻣﻜﺎﻥﭘﺬﻳﺮ ﻧﻴﺴﺖ.‬ ‫‪Vin‬‬ ‫‪VNO300M‬‬ ‫)‪(IDmax=700 mA‬‬ ‫ﺭﻭﺷﻦ ﻭ ﺧﺎﻣﻮﺵ ﻛﺮﺩﻥ ﻣﻨﺒﻊ ﺗﻐﺬﻳﻪ ﻣﻴﻜﺮﻭﭘﺮﻭﺳﺴﻮﺭ ﺩﺭ ﻓﻮﺍﺻﻞ ﺯﻣﺎﻧﻲ ﻣﻌﻴﻦ ﺑﺮﺍﻱ ﻧﻤﻮﻧﻪ ﺑﺮﺩﺍﺭﻱ ﺍﺯ ﻳﻚ ﻳﺎ ﭼﻨﺪ‬ ‫ﺳﻨﺴﻮﺭ )ﺩﺭ ﻳﻚ ﺳﻴﺴﺘﻢ ﻛﻪ ﺑﺎﻃﺮﻱ ﻛﺎﺭ ﻣﻲﻛﻨﺪﻭ ﺍﻓﺰﺍﻳﺶ ﻃﻮﻝ ﻋﻤﺮ ﺑﺎﻃﺮﻱ ﺣﺎﺋﺰ ﺍﻫﻤﻴﺖ ﺑﺎﺷﺪ(‬ ‫‪VSS= +5 V‬‬ ‫ﺳﻮﺋﻴﭻ‬ ‫ﺑﺎﺯ‬ ‫ﺳﻮﺋﻴﭻ‬ ‫ﺑﺴﺘﻪ‬ ‫ﺗﺮﺍﻧﺰﻳﺴﺘﻮﺭ‬ ‫ﺧﺎﻣﻮﺵ ⇒ ‪= o‬‬ ‫ﺗﺮﺍﻧﺰﻳﺴﺘﻮﺭ‬ ‫ﺭﻭﺷﻦ‬ ‫‪V G = 5 ⇒ V GS‬‬ ‫⇒ 5 − = ‪V G = o ⇒ V GS‬‬ ‫‪S‬‬ ‫‪PMOS‬‬ ‫1‪Q‬‬ ‫‪D‬‬ ‫‪µ−processor‬‬ ‫‪Cricuit‬‬ ‫)‪(VGS= 0 V‬‬ ‫‪off‬‬ ‫‪G‬‬ ‫‪on‬‬ ‫)‪(VGS= -5 V‬‬ ‫ﺭﺍﻩ ﺩﻳﮕﺮ : ﺍﺳﺘﻔﺎﺩﻩ ﺍﺯ ﺗﺮﺍﻧﺰﻳﺴﺘﻮﺭ ﻧﻮﻉ ‪ NMOS‬ﺑﻴﻦ ﻣﺪﺍﺭ ﻣﻴﻜﺮﻭﭘﺮﻭﺳﺴﻮﺭ ﺯﻣﻴﻦ ﻭ ﺍﺗﺼﺎﻝ ‪ Source‬ﺑﻪ ﺯﻣﻴﻦ‬ ‫+5‬ ‫‪VG‬‬ ‫ﺩﺭ ﺻﻮﺭﺗﻴﻜﻪ ﺑﺨﻮﺍﻫﻴﻢ ﻳﻚ ﻣﻨﺒﻊ ﻭﻟﺘﺎﮊ ‪ ١٢ V‬ﺭﺍ ﺗﻮﺳﻂ ﻳﻚ ﺳﻴﮕﻨــﺎﻝ ﻣﻨﻄﻘﻲ )‪(0-5 V‬ﺭﻭﺷﻦ ﻭ‬ ‫ﺧﺎﻣﻮﺵ ﻛﻨﻴﻢ )ﺑﻌﺒﺎﺭﺗﻲ ﺩﺭ ﻣﺪﺍﺭ ﺑﺎﻻ ‪ VSS=+12V‬ﺑﺎﺷﺪ(، ﻣﺪﺍﺭ ﻧﺸﺎﻥ ﺩﺍﺩﻩﺷﺪﻩ ﺩﺭ ﺷﻜﻞ ﺑﺎﻻ ﻛﺎﺭ‬ ‫ﻧﺨﻮﺍﻫﺪ ﻛﺮﺩ )ﺯﻳﺮﺍ ﻛﻪ ﺑﺎ ﺗﻐﻴﻴﺮ ‪ VG‬ﺑﻴﻦ٠ ﻭ ٥ ﻣﻘﺪﺍﺭ ‪ VGS‬ﺑﻴﻦ ٢١‐ ﻭ 7- ﺗﻌﺒﻴﺮ ﻣﻲﻧﻤﺎﻳﺪ ﻭ ﺳﻮﺋﻴﭻ‬ ‫ﻫﻤﻮﺍﺭﻩ ﺑﺴﺘﻪ ﺧﻮﺍﻫﺪ ﺑﻮﺩ( ﺑﺪﻳﻦ ﻣﻨﻈﻮﺭ‬ ‫ﻣﻲﺗﻮﺍﻥ ﺍﺯ ﻣﺪﺍﺭﻫﺎﻱ ﺯﻳﺮ ﺍﺳﺘﻔﺎﺩﻩ ﻧﻤﻮﺩ.‬ ‫2‪ID‬‬ ‫2‪D‬‬ ‫‪VSS= +12 V PMOS‬ ‫2‪Q‬‬ ‫2‪S‬‬ ‫‪100kΩ‬‬ ‫2‪G‬‬ ‫ﺑﺎﺭ‬ ‫‪Q off‬‬ ‫1‪ID‬‬ ‫1‪D‬‬ ‫‪NMOS‬‬ ‫1‪Q‬‬ ‫1‪G‬‬ ‫‪+5V‬‬ ‫‪on‬‬ ‫1‪S‬‬ ‫‪Q off‬‬ ‫1‬ ‫2‬ ‫0 = 2 ‪VG1 = 0 ⇒ VGS 1 = 0 ⎯ ⎯ ⎯→ I D1 = 0 ⇒ VGS 2 = 0 ⎯ ⎯ ⎯ → V D‬‬ ‫⎯‬ ‫‪Q on‬‬ ‫‪Q on‬‬ ‫1‬ ‫2‬ ‫21 ≈ 2 ‪V G 1 = 5 ⇒ V GS 1 = 5 ⎯ ⎯⎯ → V D 1 ≈ 0 ⇒ V GS 2 ≈ − 12 V ⎯ ⎯ ⎯ → V D‬‬ ‫‪off‬‬ ‫ﺟﻬﺖ ﻣﺤﺎﻓﻈﺖ ﺳﻮﺋﻴﭻ ‪ Q2 PMOS‬ﺩﺭ ﺑﺮﺍﺑﺮ ﺍﺗﺼﺎﻝ ﻛﻮﺗﺎﻩ ﺧﺮﻭﺟﻲ )2‪ (D‬ﺑﻪ ﺯﻣﻴﻦ ﻭ ﻣﻤﺎﻧﻌﺖ ﺍﺯ‬ ‫ﺟﺮﻳﺎﻧﻬﺎﻱ ﺑﺴﻴﺎﺭ ﺑﺎﻻﻱ 2‪ ID‬ﻣﺪﺍﺭ ﺯﻳﺮ ﺗﻮﺻﻴﻪ ﻣﻲﺷﻮﺩ .ﻣﻜﺎﻧﻴﺰﻡ ﻋﻤﻠﻜﺮﺩ ﺍﻳﻦ ﻣﺪﺍﺭ ﻣﺸﺎﺑﻪ ﻣﺪﺍﺭ ﻓﻮﻕ ﺍﺳﺖ ﻭ‬ ‫ﺑﺮﺍﻱ ﻭﻗﺘﻴﻜﻪ 5=1‪ VG‬ﺑﺎﺷﺪ:‬ ‫)‪<1A‬‬ ‫ﺩﺭ ﺟــﺮﻳـﺎﻧﻬــــﺎﻱ ﭘـﺎﻳﻴـﻦ‬ ‫7.0 < 3‪ VBE‬ﺑـﻮﺩﻩ ﻭ 3‪ Q‬ﺧﺎﻣــﻮﺵ‬ ‫)ﻣــﺎﻧﻨﺪ ﺳﻮﺋﻴﭻ ﺑﺎﺯ ﻋﻤـــﻞ ﻣﻲﻧﻤـــﺎﻳﺪ(‬ ‫ﻭﺟﻮﺩ ﺁﻥ ﻫﻴﭻ ﺗﺄﺛﻴﺮﻱ ﺑﺮ ﻋﻤﻠﻜـــــﺮﺩ‬ ‫ﻧﺨﻮﺍﻫﺪ ﺩﺍﺷﺖ.‬ ‫2‪ID‬‬ ‫2‪(ID‬‬ ‫ﺍﺳﺖ‬ ‫ﻭ ﻟﺬﺍ‬ ‫ﻣﺪﺍﺭ‬ ‫‪Q2 D‬‬ ‫2‬ ‫2‪G‬‬ ‫ﺑﺎﺭ‬ ‫‪+12 V‬‬ ‫2‪S‬‬ ‫‪E3 0.7Ω‬‬ ‫3‪Q‬‬ ‫3‪B‬‬ ‫3‪C‬‬ ‫‪100k‬‬ ‫1‪ID‬‬ ‫‪10k‬‬ ‫‪on‬‬ ‫1‪D‬‬ ‫1‪Q‬‬ ‫1‪S‬‬ ‫1‪G‬‬ ‫ﺩﺭ ﺟﺮﻳﺎﻧﻬﺎﻱ ﺑﺎﻻ )‪ VBE3 > 0.7 (ID2 >1A‬ﮔﺮﺩﻳﺪﻩ ﻭ ﻣﻮﺟﺐ ﺭﻭﺷﻦ ﺷﺪﻥ 3‪ Q‬ﻣﻲﮔﺮﺩﺩ. ﺩﺭ ﻧﺘﻴﺠﻪ 2‪VGS‬‬ ‫ﺑﻪ ﺳﻤﺖ ﺻﻔﺮ ﻣﻴﻞ ﻧﻤﻮﺩﻩ ﻭ ﺍﺯ ﺍﻓﺰﺍﻳﺶ ﺟﺮﻳﺎﻥ 2‪ ID‬ﻣﻤــﺎﻧﻌﺖ ﻣﻲﻧﻤﺎﻳﺪ. ﺩﺭ ﺣﺎﻟﺖ ﺭﻭﺷﻦ ﺷﺪﻥ 3‪ ، Q‬ﻣﻘﺎﻭﻣﺖ‬ ‫‪ 100 KΩ‬ﺩﺭ ﺣﻘﻴﻘﺖ ﺍﺗﺼﺎﻝ ﻛﻮﺗﺎﻩ ﻣﻲﺷﻮﺩ ﻭ ﻣﻘﺎﻭﻣﺖ ‪ 10 KΩ‬ﺑﺮﺍﻱ ﻣﺤﺎﻓﻈﺖ 1‪) Q‬ﺟﻠﻮﮔﻴﺮﻱ ﺍﺯ ﺍﺗﺼﺎﻝ‬ ‫ﻛﻮﺗﺎﻩﺷﺪﻥ ﺁﻥ ﻭ ﺍﻓﺰﺍﻳﺶ ﺑﻲ ﺭﻭﻳﻪ 1‪ ( ID‬ﺑﻪ ﻣﺪﺍﺭ ﺍﺿﺎﻓﻪ ﺷﺪﻩ ﺍﺳﺖ.‬ ‫‪off‬‬ ‫ﻛﺎﺭﺑﺮﺩ ﺩﺭ ﺳﺮﻭ ﺁﻣﭙﻠﻲﻓﺎﻳﺮﻫﺎﻱ ﺳﻮﺋﭽﻴﻨﮓ‬ ‫ﺩﺭ ﺳﺮﻭ ﺁﻣﭙﻠﻲ ﻓﺎﻳﺮﻫﺎﻱ ﺳﻮﺋﻴﭽﻴﻨﮓ، ﺑﺠﺎﻱ ﻛﻨﺘﺮﻝ‬ ‫‪+ VDD‬‬ ‫3‪D‬‬ ‫ﻭﻟﺘﺎﮊ ﻳﺎ ﺟﺮﻳﺎﻥ ﺍﻋﻤﺎﻝ ﺷﺪﻩ ﺑﻪ ﻣﻮﺗﻮﺭ ﺑﺼﻮﺭﺕ ﭘﻴﻮﺳﺘــﻪ‬ ‫3‪S‬‬ ‫) ﻛـﻪ ﺩﺭ ﺁﻥ ﻭﻟﺘﺎﮊ ﻣﻲﺗﻮﺍﻧﺪ ﻫـﺮ ﻣﻘﺪﺍﺭﻱ ﺑﻴﻦ ٠ ﺗﺎ‬ ‫4‪D‬‬ ‫‪Vmax‬ﺩﺍﺷﺘﻪ ﺑﺎﺷﺪ(، ﻭﻟﺘﺎﮊ ﺛﺎﺑﺖ ﺑﺼﻮﺭﺕ ﭘﺎﻟﺲ ﻫﺎﻳﻲ‬ ‫4‪S‬‬ ‫3‪Q‬‬ ‫ﺑﻪ ﻣﻮﺗﻮﺭ ﺍﻋﻤﺎﻝ ﻣﻲﺷﻮﺩ.‬ ‫1‪I‬‬ ‫1‪Q‬‬ ‫1‪D‬‬ ‫1‪S‬‬ ‫‪M‬‬ ‫2‪D‬‬ ‫4‪Q‬‬ ‫2‪I‬‬ ‫2‪Q‬‬ ‫2‪S‬‬ ‫‪H-Bridge Configuration‬‬ ‫ﺩﺭ ﺻﻮﺭﺕ ﺭﻭﺷﻦ ﺑﻮﺩﻥ ﺗﺮﺍﻧﺰﻳﺴﺘﻮﺭﻫﺎﻱ 1‪ Q‬ﻭ 4‪ Q‬ﺑﻄﻮﺭ ﻫﻤﺰﻣﺎﻥ ﺟﺮﻳﺎﻧﻲ ﺩﺭ ﺟﻬﺖ 1‪ I‬ﺍﺯ ﻣﻮﺗﻮﺭ ﻋﺒﻮﺭ ﺧﻮﺍﻫﺪ ﻧﻤﻮﺩ.‬ ‫ﻭﻟﺘﺎﮊ ﺍﻋﺎﻝ ﺷﺪﻩ ﺑﻪ ﺩﻭ ﺳﺮ ﻣﻮﺗﻮﺭ ﺑﺮﺍﺑﺮ ﺍﺳﺖ ﺑﺎ ‪VDD-VDS1-VDS4≈VDD‬‬ ‫ﺩﺭ ﺻﻮﺭﺕ ﺭﻭﺷﻦ ﺑﻮﺩﻥ ﺗﺮﺍﻧﺰﻳﺴﺘﻮﺭﻫﻱ 2‪ Q‬ﻭ 3‪ Q‬ﺑﻄﻮﺭ ﻫﻤﺰﻣﺎﻥ ﺟﺮﻳﺎﻧﻲ ﺩﺭ ﺟﻬﺖ 2‪ I‬ﺍﺯ ﻣﻮﺗﻮﺭ ﻋﺒﻮﺭ ﺧﻮﺍﻫﻨﺪ ﻧﻤﻮﺩ.‬ ‫ﺩﺭ ﺻـﻮﺭﺕ ﺍﺳﺘﻔﺎﺩﻩ ﺍﺯ ، ‪ H-Bridge‬ﺣﺮﻛﺖ ﺩﺭ ﻫﺮ ﺩﻭ ﺟﻬﺖ ﺑﺪﻭﻥ ﺍﺳﺘﻔــﺎﺩﻩ ﺍﺯ ﻣﻨﺒﻊ ﻭﻟﺘﺎﮊ ﺩﻭﮔﺎﻧﻪ )ﻣﺜﺒﺖ ﻭ‬ ‫ﻣﻨﻔﻲ( ﺍﻣﻜﺎﻥﭘﺬﻳﺮ ﺍﺳﺖ.‬ ‫ﻣﺰﺍﻳﺎﻱ ‪ MOSFET‬ﻫﺎ‬ ‫ﺗﺄﺛﻴﺮ ﺩﻣﺎ: ﺩﺭ ﺭﺍﺑﻄﻪ 2)‪VT، ID=K (VGS-VT‬ﺑﻪ ﺍﺯﺍﻱ ﻫﺮ‪ ١ْ C‬ﺣﺪﻭﺩ‬ ‫‪2 mV‬ﻛﺎﻫﺶ ﻣﻲﻳﺎﺑﺪ. ﺍﻳﻦ ﺑﻪ ﺗﻨﻬﺎﻳﻲ ﻣﻮﺟﺐ ﺍﻓﺰﺍﻳﺶ ﺟﺮﻳﺎﻥ ‪ ID‬ﺑﺎ‬ ‫ﺍﻓﺰﺍﻳﺶ ﺩﻣﺎ ﻣﻲﮔﺮﺩﺩ. ﺍﻣﺎ ﺍﺯ ﺁﻧﺠﺎﺋﻴﻜﻪ ﺍﻓﺰﺍﻳﺶ ﺩﻣﺎ ﺑﺎ ﻛﺎﻫﺶ ‪ K‬ﻫﻤـﺮﺍﻩ‬ ‫‪VCC‬‬ ‫‪IL‬‬ ‫‪RL‬‬ ‫ﺍﺳﺖ ﻭ ﺍﺛﺮ ﺁﻥ ﻏـﺎﻟﺐ ﺍﺳﺖ، ﻟـﺬﺍ ﺩﺭ ﻣﺠﻤﻮﻉ ﺟﺮﻳﺎﻥ ‪ ID‬ﺑﺎ ﺍﻓــﺰﺍﻳﺶ ﺩﻣﺎ‬ ‫3‪B‬‬ ‫ﻛﺎﻫﺶ ﻣﻲﻳـﺎﺑﺪ ﻭ ﺍﻳﻦ ﺑﺮﺧﻼﻑ ﻋﻤﻠﻜﺮﺩ ﺗﺮﺍﻧﺰﻳﺴﺘﻮﺭﻫﺎﻱ ‪ BJT‬ﺍﺳﺖ ﻛﻪ‬ ‫‪VBB‬‬ ‫ﺩﺭ ﺁﻧﻬﺎ ﺍﻓﺖ ‪VBE‬ﻭ ﺍﻓﺰﺍﻳﺶ ‪ β‬ﺑﺎ ﺩﻣﺎ ﻣﻮﺟﺐ ﺍﻓﺰﺍﻳﺶ ﺟﺮﻳﺎﻥ ﻣﻲﮔﺮﺩﺩ )ﻭ‬ ‫2‪ID‬‬ ‫ﻣـﻮﺟﺐ ﺍﻓﺰﺍﻳﺶ ‪ IC‬ﮔﺮﺩﻳﺪﻩ ﻛﻪ ﺧﻮﺩ ﻣﻮﺟﺐ ﺍﻓﺰﺍﻳﺶ ﺑﻴﺸﺘﺮ ﺩﻣﺎ‬ ‫↑ ‪T ↑⇒ β ↑⇒ I L‬‬ ‫ﮔﺮﺩﻳﺪﻩ.......)‪(thermal runaway‬‬ ‫↑ ‪T ↑⇒ V BE ↑⇒ I B ↑⇒ I L‬‬ ‫ﺑﺎ ﺗﻮﺟﻪ ﺑﻪ ﺍﻳﻨﻜﻪ ﺩﺭ ‪ MOSFET‬ﻫﺎ 0≈‪ IG‬ﻣﻲﺑﺎﺷﺪ، ﺗﺤﺮﻳﻚ ‪ gate‬ﺑﺴﺎﺩﮔﻲ ﺍﻣﻜـﺎﻥﭘﺬﻳﺮ ﺍﺳﺖ ﻭ ﺣﺘﻲ ﻣﻲﺗﻮﺍﻥ‬ ‫‪gate‬ﺭﺍ ﻣﺴﺘﻘﻴﻤﺎ ﺑﻪ ﺧﻄﻮﻁ ﺧﺮﻭﺟﻲ ﻛﺎﻣﭙﻴﻮﺗﺮ ﻣﺘﺼﻞ ﻧﻤﻮﺩ. ﺍﻣـــﺎ ﺩﺭ ‪ BJT‬ﻫﺎ )ﺑﺨﺼﻮﺹ ‪ BJT‬ﻫﺎﻱ ﻗﺪﺭﺕ(‬ ‫ﹰ‬ ‫ﺟﺮﻳﺎﻥ ﻣﻮﺭﺩ ﻧﻴﺎﺯ ﺑﺮﺍﻱ ﺗﺤﺮﻳﻚ ‪ Base‬ﺣﺪﻭﺩ 01/1 ﺍﻟﻲ 001/1 ﺟﺮﻳﺎﻥ ﻛﻠﻜﺘﻮﺭ‐ ﺍﻣﻴﺘﺮ ﺍﺳﺖ .‬ ‫ﺑﺮﺍﻱ ﻳﻚ ﺗﺮﺍﻧﺰﻳﺴﺘﻮﺭ ﻗﺪﺭﺕ ﺑﺎ ﺗﻮﺍﻧﺎﻳﻲ ﺗﺄﻣﻴﻦ ﺟﺮﻳﺎﻥ ، ‪ IC=20A‬ﺟﺮﻳﺎﻥ ‪ IB‬ﻣﻮﺭﺩ ﻧﻴﺎﺯ ﻣﻤﻜﻦ ﺍﺳﺖ ﺑﻪ‬ ‫ﺣﺪﻭﺩ‪IB=0.4A‬‬ ‫ﻫﻢ ﺑﺮﺳﺪ )ﺩﺭ ﺗﺮﺍﻧﺰﻳﺴﺘﻮﺭﻫﺎﻱ ﻗﺪﺭﺕ 05<‪ .( β‬ﻟﺬﺍ ﺗﺤﺮﻳﻚ ﺗﺮﺍﻧﺰﻳﺴﺘﻮﺭﻫﺎﻱ‬ ‫ﻗﺪﺭﺕ ‪BJT‬ﺧﻮﺩ ﻧﻴﺎﺯ ﺑﻪ ﻣﺪﺍﺭﻫﺎﻱ ﺗﻘﻮﻳﺖﻛﻨﻨﺪﻩ ﻭﺍﺳﻄﻪ ﺩﺍﺭﺩ.‬ ‫ﺗﻮﺟﻪ: ﺩﺭ ﺳﻴﺴﺘﻢﻫـﺎﻱ ﺳﻮﺋﻴﭽﻴﻨﮓ ﺳﺮﻋﺖ ﺑﺎﻻ ﺑﻌﻠﺖ ﻇﺮﻓﻴﺖ ﺧﺎﺯﻧﻲ ‪ gate‬ﺩﺭ ‪ MOSFET‬ﻫﺎ‬ ‫ﭘﺎﻟﺲﻫــﺎﻳﻲ ﺍﺯ ﺟﺮﻳﺎﻥ ﺑﺎﻻ ﻣﻮﺭﺩ ﻧﻴﺎﺯ ﺧﻮﺍﻫﺪ ﺑﻮﺩ.‬ ‫ﺯﻣـﺎﻥ ﺳﻮﺋﻴﭽﻴﻨﮓ ﺩﺭ ﺗﺮﺍﻧﺰﻳﺴﺘﻮﺭﻫـــﺎﻱ ‪ MOSFET‬ﻣﻌﻤﻮﻻ ٥١ ﺗﺎ ٠٠١ ﺑﺮﺍﺑﺮ ﺳﺮﻳﻌﺘﺮ ﺍﺯ ﺗﺮﺍﻧﺰﻳﺴﺘﻮﺭﻫﺎﻱ‬ ‫ﹰ‬ ‫‪BJT‬ﺍﺳﺖ )ﺯﻣﺎﻥ ﺳﻮﺋﻴﭽﻴﻨﮓ ﻋﺒﺎﺭﺗﺴﺖ ﺍﺯ ﺯﻣﺎﻥ ﻻﺯﻡ ﺑﺮﺍﻱ ﺗﻐﻴﻴﺮ ﺣﺎﻟﺖ ﺗﺮﺍﻧﺰﻳﺴﺘﻮﺭ ﺍﺯ ﻭﺿﻌﻴﺖ ﺭﻭﺷﻦ ﻳﺎ‬ ‫ﺍﺗﺼﺎﻝ ﻛﻮﺗﺎﻩ ﺑﻪ ﺣﺎﻟﺖ ﺧﺎﻣﻮﺵ ﻳﺎ ﻣﺪﺍﺭ ﺑﺎﺯ ﻭ ﺑﺎﻟﻌﻜﺲ( ﺑﺮﺍﻱ ﺗﺮﺍﻧﺰﻳﺴﺘﻮﺭﻫﺎﻱ ‪ MOSFET‬ﺯﻣﺎﻥﻫﺎﻱ ﺭﻭﺷﻦ ﻭ‬ ‫ﺧﺎﻣﺵ ﺷﺪﻥ ﺯﻳﺮ ‪ 100 ηs‬ﻣﻲﺑﺎﺷﺪ.‬ ‫ﺍﻣﻜﺎﻥ ﺍﺳﺘﻔﺎﺩﻩ ﺍﺯ ﺗﺮﺍﻧﺰﻳﺴﺘﻮﺭﻫﺎﻱ ‪ MOSFET‬ﺑﺼﻮﺭﺕ ﻣﻮﺍﺯﻱ )ﺑﺮﺍﻱ ﺗﺄﻣﻴﻦ ﺟﺮﻳﺎﻥ ﺑﻴﺸﺘﺮ( ﻭﺟﻮﺩ ﺩﺍﺭﺩ ﺩﺭ‬ ‫ﺻﻮﺭﺗﻴﻜﻪ ﺗﺮﺍﻧﺰﻳﺴﺘﻮﺭﻫﺎﻱ ‪ BJT‬ﺭﺍ ﻧﻤﻲﺗﻮﺍﻥ ﺑﻄﻮﺭ ﻣﻮﺍﺯﻱ ﺍﺳﺘﻔﺎﺩﻩ ﻧﻤﻮﺩ .ﺩﺭ ﺗﺮﺍﻧﺰﻳﺴﺘـﻮﺭﻫﺎﻱ‪ BJT‬ﺑﻌﻠﺖ‬ ‫ﻧﺎﻣﺴﺎﻭﻱ ﺑﻮﺩﻥ ‪ VBE‬ﺑﺮﺍﻱ ﺩﻭ ﺗﺮﺍﻧﺰﻳﺴﺘــﻮﺭ، ﺗﺮﺍﻧﺰﻳﺴﺘﻮﺭﻱ ﻛﻪ ﺩﺍﺭﺍﻱ ‪ VBE‬ﻛﻮﭼﻜﺘﺮ ﺍﺳﺖ، ﺟﺮﻳﺎﻥ‬ ‫ﺑﻴﺸﺘﺮﻱ ﺭﺍ ﺍﺯ ﺧﻮﺩ ﻋﺒﻮﺭﺩﺍﺩﻩ )‪ (Current hogging‬ﻛﻪ ﻣﻮﺟﺐ ﮔﺮﻡ ﺷﺪﻥ ﺑﻴﺸﺘﺮ ﺁﻥ ﻣﻲﺷﻮﺩ. ﺍﻳﻦ ﺑﻪ‬ ‫ﻧﻮﺑﻪ ﺧﻮﺩ ﻣﻮﺟﺐ ﻛﺎﻫﺶ ﺑﻴﺸﺘﺮ ‪ VBE‬ﺷﺪﻩ ﻭ ﺟﺮﻳﺎﻥ ﻋﺒﻮﺭﻱ ﺍﺯ ﺗﺮﺍﻧﺰﻳﺴﺘﻮﺭ ﻣﺰﺑـــﻮﺭ ﺭﺍ ﺣﺘﻲ ﺑﻴﺸﺘﺮ‬ ‫ﺍﻓﺰﺍﻳﺶ ﻣﻲﺩﻫﺪ .)‪ (Thermol runamay‬ﺍﻣـﺎ ﺩﺭ ﺗﺮﺍﻧﺰﻳﺴﺘﻮﺭﻫﺎﻱ‬ ‫‪VCC‬‬ ‫، ‪MOSFET‬ﺗﺮﺍﻧﺰﻳﺴﺘﻮﺭﻱ ﻛﻪ ﺟﺮﻳﺎﻥ ﺑﻴﺸﺘﺮﻱ ﺭﺍ ﺍﺯ ﺧــﻮﺩ ﻋﺒﻮﺭ‬ ‫ﺩﻫﺪ ﮔﺮﻡ ﺷﺪﻩ ﻛﻪ ﻣﻮﺟﺐ ﭘﺎﻳﻴﻦ ﺁﻣﺪﻥ ‪ ID‬ﻣﻲﮔﺮﺩﺩ. ﺗﺎ ﺍﻳﻨﻜﻪ‬ ‫‪IL‬‬ ‫‪RL‬‬ ‫ﺑﺎﻻﺧـــﺮﻩ ﺳﻬﻢ ﺟﺮﻳﺎﻥ ﻋﺒﻮﺭﻱ ﺩﻭ ﺗﺮﺍﻧﺰﻳﺴﺘﻮﺭ ﺑﺮﺍﺑﺮ ﮔﺮﺩﺩ.‬ ‫‪RB‬‬ ‫‪VBE‬‬ ‫ﻣﺪﻝ ﺳﻮﺋﻴﭽﻴﻨﮓ ﺑﺮﺍﻱ ‪ MOSFET‬ﻫﺎ‬ ‫ﺍﻏﻠﺐ ﺗﺮﺍﻧﺰﻳﺴﺘﻮﺭﻫﺎﻱ ﻗﺪﺭﺕ ‪ MOSFET‬ﺍﺯ ﻧﻮﻉ ﺍﻓﺰﺍﻳﺸﻲ )‪ (Enhancement‬ﻣﻲﺑﺎﺷﻨﺪ.‬ ‫ﺩﺭ ﻫــﺮ ﺩﻭ ﻧـﻮﻉ ﻧﺮﺍﻧﺰﻳﺴﺘﻮﺭﻫــــﺎﻱ‬ ‫،)‪ MOSFET (NMOS,PMOS‬ﺍﺗﺼﺎﻝ ﺑﻴﻦ‬ ‫ﻣﺎﺩﻩ ﺯﻣﻴﻨﻪ )‪ (Substrate‬ﻭ ﻛﺎﻧﺎﻝ ﻫﺪﺍﻳﺖ‬ ‫ﻫﻤﺎﻧﻨﺪ ﻳﻚ ﺩﻳﻮﺩ ﺍﺳﺖ .ﺍﻣﺎ ﺍﺯ ﺁﻧﺠﺎﺋﻴﻜﻪ ﺍﻏﻠﺐ ﻣﺎﺩﻩ‬ ‫ﺯﻣﻴﻨﻪ )‪ (SS‬ﺑﻪ ﺳﻮﺭﺱ )‪ (S‬ﻣﺘﺼﻞ ﺍﺳﺖ ﻟﺬﺍ‬ ‫ﻣﻲﺗﻮﺍﻥ ﻭﺟﻮﺩ ﻳﻚ ﺩﻳـﻮﺩ ﺭﺍ ﺑﻴﻦ ﺳـﻮﺭﺱ )‪ (S‬ﻭ‬ ‫ﺩﺭﻳﻦ )‪ (D‬ﺩﺭ ﺗﻐﺬﻳﻪ ﻣﻌﻜﻮﺱ ﻣﺘﺼﻮﺭﺷﺪ.‬ ‫‪D‬‬ ‫‪ID‬‬ ‫‪D‬‬ ‫‪Dds‬‬ ‫‪G‬‬ ‫‪Cds‬‬ ‫ﻇﺮﻓﻴﺖ ﺧﺎﺯﻧﻲ ﺑﻴـﻦ )ﮔﻴـﺖ ﻭﺳــﻮﺭﺱ(، )ﮔﻴﺖ ﻭ‬ ‫ﺩﺭﻳــﻦ( ﻭ ﻫﻤﭽﻨﻴﻦ )ﺩﺭﻳﻦ ﻭ ﺳﻮﺭﺱ( ﻣﻲﮔﺮﺩﺩ.‬ ‫‪n‬‬ ‫‪P‬‬ ‫‪Cgd‬‬ ‫‪SS‬‬ ‫‪n‬‬ ‫‪G‬‬ ‫‪n‬‬ ‫‪Cgs‬‬ ‫‪S‬‬ ‫‪S‬‬ ‫ﻧﺎﺣﻴﻪ ﺗﻬﻲ‬ ‫‪D‬‬ ‫ﻭﺟﻮﺩ ﻋﺎﻳﻖ )2‪ (Sio‬ﺑﻴﻦ ﮔﻴﺖ ﺑﺎ ﺳﻮﺭﺱ ﻭ ﺩﺭﻳﻦ ﻭ‬ ‫ﻫﻤﭽﻨﻴﻦ ﻭﺟﻮﺩ ﻧﺎﺣﻴﻪ ﺗﻬﻲ ﺑﻴـﻦ )‪ (SS‬ﻭ ﻛﺎﻧﺎﻝ‬ ‫ﻫﺪﺍﻳﺖ )ﺑﻌﻠﺖ ﺍﺗﺼﺎﻝ ‪ SS‬ﺑﻪ ‪ (S‬ﺑﺎﻋﺚ ﭘﺪﻳﺪ ﺁﻣﺪﻥ‬ ‫ﻧﺎﺣﻴﻪ ﺗﻬﻲ‬ ‫2‪Sio‬‬ ‫2‪Sio‬‬ ‫‪D‬‬ ‫‪Cgd‬‬ ‫‪P‬‬ ‫‪n‬‬ ‫‪SS‬‬ ‫‪Dds‬‬ ‫‪P‬‬ ‫‪G‬‬ ‫‪Cds‬‬ ‫‪Cgs‬‬ ‫‪S‬‬ ‫‪G‬‬ ‫‪P‬‬ ‫‪S‬‬ ‫ﺗﺎ ﺯﻣﺎﻧﻴﻜﻪ )‪ (SS‬ﺑﻪ )‪ (S‬ﻣﺘﺼﻞ ﻧﮕﺸﺘﻪ ﺑﺎﺷﺪ، ﻳﻚ ‪ MOSFET‬ﻛﺎﻣﻼ ﻣﺘﻘﺎﺭﻥ ﺑﻮﺩﻩ ﻭ ﺟﺎﻱ ﺩﺭﻳﻦ ﻭ‬ ‫ﹰ‬ ‫ﺳﻮﺭﺱ ﻗﺎﺑﻞ ﺗﻌﻮﻳﺾ ﺍﺳﺖ. ﺩﺭ ﺣﻘﻴﻘﺖ ﻫﺮ ﭘﺎﻳﺎﻧﻪﺍﻱ ﻛﻪ ﺑﻪ )‪ (SS‬ﻣﺘﺼـﻞ ﺷـﻮﺩ، ﺗﺮﻣﻴﻨﺎﻝ ﺳﻮﺭﺱ ﺭﺍ‬ ‫ﺗﺸﻜﻴﻞ ﻣﻲﺩﻫﺪ ﻭ ﭘﺲ ﺍﺯ ﺍﻳﻦ ﺍﺗﺼﺎﻝ ﺩﻳﮕﺮ ﺩﺭﻳﻦ ﻭ ﺳــﻮﺭﺱ ﻗﺎﺑﻞ ﺗﻌﻮﻳﺾ ﻧﻴﺴﺘﻨﺪ )ﺑﺎ ﺗﻮﺟﻪ ﺑﻪ ﻭﺟﻮﺩ‬ ‫ﺩﻳﻮﺩ ‪(Dds‬‬ ‫ﺑﻪ ﺩﻳﻮﺩ ‪ Dds‬ﻭ ﺧﺎﺯﻥﻫﺎﻱ ‪ Cgd ، Cgs‬ﻭ ‪ Cds‬ﺩﻳﻮﺩ ﺧﺎﺯﻥﻫﺎﻱ ﭘﺎﺭﺍﺯﻳﺘﻲ ﮔﻔﺘﻪ ﺷﺪﻩ ﻭ ﺑﻪ ﻣﺪﻟﻬـﺎﻱ ﺍﺭﺍﺋﻪ‬ ‫ﺷﺪﻩ ﺩﺭ ﺍﺷﻜﺎﻝ ﻓﻮﻕ ﻣﺪﻝ ﭘﺎﺭﺍﺯﻳﺘﻲ )‪ (Parasitic Model‬ﮔﻔﺘﻪ ﻣﻲﺷﻮﺩ. ﺑــﺎﺗﻮﺟﻪ ﺑﻪ ﻧﻘﺶ ﻣﻬﻢ‬ ‫ﺧﺎﺯﻥﻫﺎﻱ ﻣﺰﺑﻮﺭ ﺩﺭ ﻋﻤﻠﻴﺎﺕ ﺳﻮﺋﻴﭽﻴﻨﮓ، ﺍﺳﺘﻔــﺎﺩﻩ ﺍﺯ ﺍﻳﻦ ﻣـﺪﻝ )ﺑﺨﺼﻮﺹ ﺩﺭ ﺳﻴﺴﺘﻢﻫﺎﻱ ﺳﻮﺋﭽﻴﻨﮓ‬ ‫ﻓﺮﻛﺎﻧﺲ ﺑﺎﻻ( ﺿﺮﻭﺭﻱ ﺍﺳﺖ.‬ ‫ﻣﻌﻤﻮﻻ ﺷﺮﻛﺖﻫﺎﻱ ﺳﺎﺯﻧﺪﻩ ﺳﻪ ﻛﻤﻴﺖ ﺭﺍ ﻛﻪ ﺗﻌﻴﻴﻦﻛﻨﻨﺪﻩ ﻇﺮﻓﻴﺖ ﺧﺎﺯﻧﻲ ﻣﻮﺟﻮﺩ ﺩﺭ ‪ MOSFET‬ﺍﺳﺖ ﺑﺼﻮﺭﺕ‬ ‫ﹰ‬ ‫‪Ciss= effective input (gate) capacitance with Cds shorted = Cgd||Cgs‬‬ ‫‪Coss= effective output (drain) capacitance = Cds||Cgd‬‬ ‫‪Crss= reverse Transfer (drain) capacitance = Cgd‬‬ ‫ﺩﺭ ﺑﺮﮔﻪﻫﺎﻱ ﺍﻃﻼﻋﺎﺗﻲ ﻣﻌﺮﻓﻲ ﻣﻲﻧﻤﺎﻳﻨﺪ.‬ ...
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