100209SLIM presentation

100209SLIM presentation - SLIM: Short Cycle Time and Low...

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Unformatted text preview: SLIM: Short Cycle Time and Low Inventory in Manufacturing at Samsung Electronics Corp., (SEC) 10/23/2008 SLIM Presentation 1 Introductions Prof. Rob Leachman, UCB IEOR Dept., technical author and SLIM project manager Dr. Jeenyoung Kang, Leachman & Associates LLC, technical author (UCB IEOR PhD `96) Dr. Vincent Lin, Leachman & Associates LLC, technical author (UCB IEOR PhD `99) Mr. J. W. Kim, SEC Executive VP Semiconductor Manufacturing, SLIM project sponsor 10/23/2008 SLIM Presentation 2 Introduction to SEC Market share leader in DRAMs, SRAMs, TFT-LCDs Design and fabrication of integrated circuits centered in Kiheung, Korea 11 large fab lines, 20,000 employees 500,000 wafers per month 10/23/2008 SLIM Presentation 3 SEC in Kiheung, Korea 10/23/2008 SLIM Presentation 4 The business problem 1995: DRAM manufacturers enjoy record profits At end of 1995, DRAM market changed from seller's market to buyer's market Urgent need to reduce manufacturing cycle time 10/23/2008 SLIM Presentation 5 The business problem 10/23/2008 SLIM Presentation 6 The project SLIM project initiated in March, 1996 Ground rules: joint effort of SEC and outside IE/OR experts cycle time reduction as early as possible consensus approval and credibility of solutions no diminution of yields or productivity 10/23/2008 SLIM Presentation 7 Some fab terminology Cycle time (a.k.a. lead time or flow time) WIP (work-in-process) Fab-out schedule Steppers (photolithography machines, usually the fab bottleneck) 10/23/2008 SLIM Presentation 8 The challenge Fabrication of advanced memory devices Re-entrant manufacturing process Fragile manufacturing process 10/23/2008 SLIM Presentation 9 The challenge (cont.) Device XC ZB UC SB XC 10/23/2008 Step 1.0 1.0 1.0 1.0 5.0 Qualified Steppers #2, #5, #68 #1, #2, #5 #8, #9 #1 #61, #65, #86 SLIM Presentation 10 SLIM scheduling principles 10/23/2008 SLIM Presentation 11 Conventional paradigm: lot-based dispatching Scheduling objects: lots Paradigm: when machine is idle, select suitable lot with the highest priority Determine efficient priority rules Most commonly, priority is given to lots determined to be behind schedule 10/23/2008 SLIM Presentation 12 Problems with conventional lot dispatching Machine M1 Machine M2 A-1 B-0 B-1 A-1 A-2 B-1 Start of shift Time Note: "A-1" denotes a lot of device A with a slack score = 1. Lot dispatching systems schedule too many changeovers. 10/23/2008 SLIM Presentation 13 SLIM paradigm: manage WIP Scheduling objects: device/steps Paradigm: determine how many lots of each step of each device should be completed this shift, and allocate to machines Maintain target WIP profile, maximize bottleneck throughput, and control machine changeovers 10/23/2008 SLIM Presentation 14 SLIM schedules Machine M1 Machine M2 A-1 B-0 A-1 B-1 A-2 B-1 Start of shift Time 10/23/2008 SLIM Presentation 15 Fab out schedule SLIM works to a target fab out schedule Expressed through continuous-time for every device Analyzed to be capacity-feasible 10/23/2008 SLIM Presentation 16 Target cycle time The target cycle time for each device is established according to standard learning curves: 2.5 Cycle time / mature cycle time Similar technology 2 Different Very different 1.5 1 1 2 3 4 5 6 7 8 9 10 Months since qualification 10/23/2008 SLIM Presentation 17 Target cycle time for steps The process time plus material handling time for each step is termed the standard cycle time (sct). The difference between the target cycle time and the total standard cycle time for a device is its total buffer time (TBT). A key strategy of SLIM concerns how one allocates TBT among steps of the process flow... 10/23/2008 SLIM Presentation 18 Allocating buffer time Fab process Photo Layer 1 Photo Layer 2 Photo Layer 3 Photo Layer 4 WIP profile when there is no process or equipment trouble: 10/23/2008 SLIM Presentation 19 Allocating buffer time Fab process Process trouble Photo Layer 1 Photo Layer 2 Photo Layer 3 Photo Layer 4 WIP profile when there is process trouble: Layer 3 photo WIP running out 10/23/2008 SLIM Presentation 20 Target cycle time for steps SLIM allocates TBT to steps according to statistics on actual cycle time. Non-bottleneck steps are not allocated buffer time. Bottleneck steps are allocated buffer time in proportion to the discrepancy between the upstream actual cycle time and the standard cycle time ... 10/23/2008 SLIM Presentation 21 Target cycle time for steps For bottleneck step j on device i, tct ij = sct ij + bt ij , where bt ij = ACTij - SCTij NBi (ACTij - SCTij ) j =1 (TBTi ) and ACTij is the average actual cycle time and SCTij is the total standard cycle time between bottleneck steps j - 1 and j. 10/23/2008 SLIM Presentation 22 Target cycle time proposed by others Use a common multiple of process time, or Make it proportional to actual or simulated average cycle time These targets do not concentrate WIP at the bottleneck as much as SLIM does 10/23/2008 SLIM Presentation 23 Ideal production quantity IPQ of a device/step = how many units need to be completed by the end of the shift to meet the target cycle time and the target fab outs Target cycle time to fab out 1 2 3 4 5 6 7 8 9 Fab out schedule 10/23/2008 SLIM Presentation 24 Ideal production quantity IPQ = (Target fab outs due until the target cycle time to fab out plus one shift) - (actual fab outs to date) - (actual downstream WIP) Target cycle time to fab out 1 2 3 4 5 6 7 8 9 Fab out schedule 10/23/2008 SLIM Presentation 25 Ideal production quantity IPQ = (Target fab outs due until the target cycle time to fab out plus one shift) - (actual fab outs to date) - (actual downstream WIP) IPQij = 0 Ni TCTFOij +0.33 1 TFOi (t )dt - AFOi (t )dt - (FYik )( AWik ) FYij k = j +1 - - 10/23/2008 SLIM Presentation 26 Schedule score SS of device/step = how many days early or late is the current production of this device/step SS = - IPQ / (Avg. fab out rate over cycle time to out) SLIM prioritizes device/steps by SS, and strives to complete the IPQ for each device/step 10/23/2008 SLIM Presentation 27 Photo starvation index Downstream WIP situation: Step A Next photo step Step B Next photo step According to PSI, step B should be dispatched first 10/23/2008 SLIM Presentation 28 Photo starvation index PSI of non-bottleneck step = score indicating relative surplus or deficit of actual WIP vs. target WIP downstream up to next bottleneck step: PSI = W(t) / t where t is actual cycle time to next photo visit and W(t) is the scanner workload until time t SLIM also considers PSI in addition to SS when prioritizing device/steps at non-bottleneck equipment. 10/23/2008 SLIM Presentation 29 SLIM E,T Schedule device/steps with low SS and low PSI SLIM scheduling Etch Thin Films Fab Out Diffusion Photo WIP Fab In SLIM - I Control fab-ins according to target WIP levels SLIM - D Form batches and stepper of device/steps with capacity low SS and low PSI 10/23/2008 SLIM Presentation SLIM - S Schedule scanners so as to complete IPQs and for maximum utilization 30 SLIM logic Make a shift schedule, with on-line updates Prioritize device/steps by SS and PSI First pass: Assign WIP to complete IPQs by end of shift Choose machine based on setup avoidance, least candidate WIP, etc. Second pass: Assign remaining WIP Save changeovers where possible 10/23/2008 SLIM Presentation 31 SLIM-S schedule 10/23/2008 SLIM Presentation 32 SLIM planning A sophisticated linear programming model ("SLIM-O") is utilized to identify specific bottlenecks for fab-out demands SLIM-O is utilized to plan the ramp-up of new devices ("capacity simulation") how many machines to install and when which machine/steps to qualify when 10/23/2008 SLIM Presentation 33 SLIM planning SLIM-O models the inter-step arrangement constraints: Step 1.0 5.0 9.0 #04 #44, #46 Qualified machines #37 #44, #45 #39 #01, #03 #44, #46, #57 #44, #45, #57 #01, #03, #57 SLIM-O optimizes the routing of WIP through the machines 10/23/2008 SLIM Presentation 34 Key ideas of SLIM We can reduce total WIP and cycle time by wisely positioning the buffer WIP Concentrate buffer WIP at the bottleneck steps following the troublesome portions of the process flow Then we can lower the overall factory WIP and still achieve the same fab throughput Good scheduling can increase area throughput for the same level of WIP Then we can lower overall WIP some more 10/23/2008 SLIM Presentation 35 SLIM implementation 10/23/2008 SLIM Presentation 36 SLIM teams SLIM project teams for pairs of fab lines First team formed in March, 1996 for Lines 4 and 5 Team for Lines 6 and 7 started March, 1997 Ultimately, 8 SLIM teams were formed 10/23/2008 SLIM Presentation 37 SLIM steering committee 10/23/2008 SLIM Presentation 38 SLIM teamwork Inter-disciplinary team membership including several with graduate OR/MS training Developed SLIM database and SLIM modules Trained 3,000 people in SLIM logic & use 10/23/2008 SLIM Presentation 39 SLIM training 10/23/2008 SLIM Presentation 40 SLIM results 10/23/2008 SLIM Presentation 41 SEC DRAM cycle times 100 Avg. fab cycle time (days) 90 80 70 60 50 40 30 20 Dec-95 Jun-96 Dec-96 Jun-97 Dec-97 Jun-98 Dec-98 Jun-99 SLIM begins SLIM begins on all lines 4M 16M 64M 128M SLIM begins Standard cycle time 10/23/2008 SLIM Presentation 42 Benefits of SLIM Faster rate of yield improvement Reduction of late production deliveries Before At Die out At Test out 30% 26% After 4% 3% Reduced lead times to customers Higher selling prices ... 10/23/2008 SLIM Presentation 43 Financial impact of SLIM Sales revenues for the DRAM output of the Kiheung fab lines March, 1996 - December 2000 were tallied: $21.9 billion Sales revenues were re-computed assuming fab cycle times had stayed at 80 days 10/23/2008 SLIM Presentation 44 DRAM selling prices 200.00 180.00 Average selling price ($) 160.00 140.00 120.00 100.00 80.00 60.00 40.00 20.00 0.00 Mar-96 Sep-96 Mar-97 Sep-97 Mar-98 Sep-98 Mar-99 Sep-99 4M 16M 64M 128M 10/23/2008 SLIM Presentation 45 Financial impact of SLIM The result: SLIM increased DRAM sales revenues by US $954 million Including non-DRAM production, the revenue gain was $1.1 billion just during the project, billions more in subsequent years Market share up from 18% to 22%, later up to 34% 10/23/2008 SLIM Presentation 46 Competitive impact of SLIM Japanese companies retrench from DRAM market, IBM and TI exit market Hynix effectively bankrupted, Micron and Infineon suffer heavy losses SEC becomes most profitable semiconductor manufacturer 10/23/2008 SLIM Presentation 47 Adoption of Methodology SLIM ported to SEC's LCD factories After publication, SLIM methodology increasingly adopted by other semiconductor manufacturers and influencing commercial software vendor offerings and customer choices 10/23/2008 SLIM Presentation 48 Summary of SLIM Target cycle time methodology On-line scheduling Simulation Advanced LP planning Trained 3,000 people 10/23/2008 SLIM Presentation 49 Number one in DRAMs! ...
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