Lecture17 - ENGRD 2300 Introduction to Digital Logic Design...

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ENGRD 2300 Introduction to Digital Logic Design Fall 2009 Registers Counters Shift Registers Lecture 17: 1
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Announcements HW4 HW4 Will be posted on Blackboard soon Will be due Friday, Nov 6 Lab 6 Will be posted on Blackboard soon P l b d S d N 8 (b t ill t t l Prelab due Sunday, Nov 8 (but you will not get early feedback) Labs meet Nov 9,10, 11 Lab 7 Postlab instead of prelab. Open labs Nov 23, 24, Regular labs Dec 1,2,3 Open labs Nov 23, 24, Regular labs Dec 1,2,3 Lecture 17: 2
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Readings Sections 7.1-7.8 Sections 5.1, 5.4, 7.13 Now’s the time to worry about the HDL (Verilog) stuff I.e., Review Verilog parts of Ch 6 Sections 8.1, 8.4 – 8.5 (Today) Sections 8.7 – 8.9 (Thursday) Lecture 17: 3
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