JJJuly09LessonTen

JJJuly09LessonTen - Fall 07 Edition Key Lecture Concepts...

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Fall 07 Edition Key Lecture Concepts for CoE225/EE 271 (Mostly Digital Electronics) Lesson 10 The Sense Amplifier Flip-flop Circuit for DRAM Memories; MOS Transistor Arrays for Decoders, Programmable Read Only Memories, and Other Digital Circuits; Introduction to HSPICE Simulation of Digital Circuits. Lesson Objectives and Overview: The learning objective of this lesson is to understand the basic concepts for the operation of the Sense Amplifier Flip-flop circuit. The amplifier consists of two cross-coupled CMOS inverters, the same Flip-flop circuit used for storage in lesson 9. This remarkable circuit not only enables the read operation of capacitor memory cells but also the writing and necessary refresh operations for the DRAM cell. The sense amplifier enables both DRAM and SRAM memories to have not only multi-million bit capacity on a single chip but also memory cycle times of less than a nano- second. Because the sense amplifier is based on CMOS inverter technology, many of the fundamental concepts associated with inverters and the changing of voltages across capacitance loads will be reinforced. Because of the high digital gain associated with flip- flops, the sense amplifier circuit is a component in many present-day novel analog and digital circuits. In the latter part of the lesson, HSPICE simulation results for both SRAM and DRAM memory circuits using 0.18 m transistors are presented and discussed in some detail to give a feeling for the technical achievements and tradeoff issues in memory design. The second part of the lesson shows how large MOST arrays are used to make low power dissipation decoders, programmable logic arrays (PLAs), and read-only memories (ROMS). These circuit arrays are relatively easy to understand if the concepts in lessons 7−9 have been mastered. The circuits will be “figured out” by small group interactive discussions during class with instructor guidance. A) The Flip-Flop Sense Amplifier Approach for DRAM Reading and Write Operations The key to the high speed read/write operation of semiconductor memories is the remarkable CMOS Flip-Flop introduced in lesson 9. The circuits in Figs10.1-10.5 are used to explain how the basic CMOS flip-flop was modified to make an excellent read/write amplifier for charge-storage memories. It is an interesting invention trajectory that you should appreciate. When two identical inverters are connected in series, as shown in fig10.1b , the transfer curve (v 02 versus v 01 ) is as shown in fig10.1c . By constructing Table 10.1, you will find that the output range with high digital gain is surprisingly greater than in the transfer curves for the individual inverters, which are given in fig10.1a . Note that the output of the first inverter equals the input to the second inverter for the series connection in fig10.1 and that the
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by R.H.Cornely, Fall 07 Edition All Copyrights Reserved 2 curved sections of the inverters were modeled by straight lines for convenience. However, this modeling does not affect the final result. A “feel” for why there is such a sharp rise in the
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This note was uploaded on 02/18/2010 for the course ECET 271 taught by Professor Hu during the Spring '05 term at NJIT.

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JJJuly09LessonTen - Fall 07 Edition Key Lecture Concepts...

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