271hw10 - the Verilog model, testbench, and simulation...

Info iconThis preview shows page 1. Sign up to view the full content.

View Full Document Right Arrow Icon
SAN JOSE STATE UNIVERSITY Charles W. Davidson College of Engineering DEPARTMENT OF ELECTRICAL ENGINEERING EE271 Homework #10 1. Write a Verilog code for a 16-bit combinational unsigned multiplication circuit. Include the Verilog model, testbench, and simulation waveforms in your homework. 2. Write a Verilog code for a 16-bit sequential add/shift unsigned multiplication circuit. Include
Background image of page 1
This is the end of the preview. Sign up to access the rest of the document.

Unformatted text preview: the Verilog model, testbench, and simulation waveforms in your homework. 3. Write a Verilog code for Radix-four Booth algorithm multiplication circuit. Include the Verilog model, testbench, and simulation waveforms in your homework. 4. Write a Verilog code for 16-bit sequential division circuit. Include the Verilog model, testbench, and simulation waveforms in your homework...
View Full Document

This note was uploaded on 02/21/2010 for the course EE 271 taught by Professor Thuyle during the Spring '08 term at San Jose State University .

Ask a homework question - tutors are online