hw_10 - ECE 440 Homework 9 Fall 2009 Due: Friday, Nov 13,...

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Unformatted text preview: ECE 440 Homework 9 Fall 2009 Due: Friday, Nov 13, 2009 1. A voltage V A = 23.03 kT/q is being applied to a step junction diode with n- and p-side dopings of N A = 10 17 cm-3 and N D = 10 16 cm-3 . Make a dimensioned log(p and n) versus x sketch of both the majority and minority carrier concentrations in the quasi-neutral regions of the device. Be sure to identify points of 10 and 20 diffusion lengths on the plot. 2. Consider the p +-n step diode pictured above. Note that p is infinite for 0 x x b and p = 0 for x b x x c . Excluding biases that would cause high-level injection or breakdown, develop an expression for the room-temperature I-V characteristic of the diode. Assume that the depletion width (W) never exceeds x b for all biases of interest. 3. P-N junction Simulation. To analyze a pn junction, we solve the continuity equations for electrons and holes, the drift-diffusion equations (which describe how carriers move in response to an electric field), and Poissons equation (because when charge carriers move, they change the...
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hw_10 - ECE 440 Homework 9 Fall 2009 Due: Friday, Nov 13,...

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