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Unformatted text preview: LAB 4 BASIC COMPUTER ORGANIZATION Note Students have to be aware of and observe the university regulations concerning the academic fraud: http://web5.uottawa.ca/admingov/regulation_13.html http://www.uottawa.ca/plagiarism.pdf http://www.sass.uottawa.ca/writing/kit/plagiarism.php 1. Objectives In this laboratory, students will analyse the structure of a basic computer , will devise and design its control unit , and will use opcodes to write simple programs in machine code . The design must function in simulation, and also on the UP2 Altera development board. 2. Equipment and Supplies: * Quartus II (student edition or web edition) * Altera UP2 board with - Byte blaster cable - EMP7128S CPLD - Power supply 7 VDC, 250 mA * Tools: anti-static wrist straps, 22 gauge wire, hand-tools 3. References • You are provided with all the .bdf files, except one that describes the combinational circuits which generates the output and transition functions of the Control Unit and which you are expected to conceive and develop. Their logic diagrams are annexed to this document. • Chapters 5 and 6 of the textbook: Computer Systems Structures , Morris Mano, 3 rd edition, 1993, ISBN 0-13-175563-3. • The course notes • The user guide of the Altera UP2 development kit ( http://www.altera.com/literature/univ/upds.pdf ). The board described in this document is identical to the boards of our labs, except that they use the EPF10K70 PLD. The pins position is the same on both boards. • The data sheet of the family FLEX 10K ( http://www.altera.com/literature/ds/dsf10k.pdf ) 4. The Structure of the Basic Computer 4.1 General View This laboratory implements a computer having a structure that is very close to the one presented in figure 5.4 on page 130 of your textbook. However, there are two major differences: 1. The designed computer’s memory (storing both programs and data) has a capacity of 256 words of 8 bits (256 x 8). In the textbook, the BASIC computer has a memory with words of 16 bits, each word being capable of storing one memory-reference instruction (which consists there of a 4-bit opcode and a 12-bit memory address ). In this lab, a memory-reference instruction is 2 byte long as well, but the msb byte carries the opcode , while the lsb byte contains the operand address (8 bits are enough to address a memory space of 2 8 = 256 memory locations); as such, a 2-byte memory-reference instruction is stored in 2 consecutive memory locations (two 1-byte words). As a consequence, two successive READ cycles are needed to fetch an instruction: first to get the opcode , and the second to get the address of the data that the opcode will use. 2. The second major difference consists in the additional circuits which will allow a user to visualize the contents of the memory independently of having a program running or not on the UP2 board. CEG 2136 Lab 4 SITE Lab 4 Page 2 of 23 University of Ottawa CEG2136: Computer Architecture I (Fall 2009) User can preset the DIP switches of the FLEX 10K with the memory address to be visualized. User can preset the DIP switches of the FLEX 10K with the memory address to be visualized....
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- Fall '09
- Computer Architecture, Central processing unit, Processor register, Machine code, Addressing mode, INPUT VCC