ECE620_hw1

# ECE620_hw1 - the minimal machine Also make the...

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ECE 620 Dr. R. ROOSTA H.W # 1 1) Derive a state table for the following circuit. Assume all Flip-Flops are clocked. 2) Design a one-input, one-output sequence detector which produces an output 1 every time the sequence 0101 is detected, and an output 0 at all other times. For example, when the input sequence is 010101, the corresponding output sequence is 000101. (Hint: It is more convenient to start the synthesis procedure by constructing the state diagram of the machine.). Assume , at time t1, the machine is in the initial state, designated as A. 3) Given the table below, determine the set of incompatible pairs of states using Pair-Chart technique.

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4) For the following completely specified machine, find the minimal state table. Show that the set of MEC's is closed and disjoint. 5) For the following machine, using the pair chart technique, find the set of compatibility classes and
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Unformatted text preview: the minimal machine. Also, make the compatibility graph for this machine. 6) The machines M1, M2 and M3 are connected as shown below. Derive the state table for the composite machine M. 7) Figure 1 is a transition graph for a synchronous machine and figure 2 presents its state assignment. a) Derive the state table for the machine. b) Calculate the Y matrix. c) Calculate the J-K flip flop excitation Karnaugh Maps. d) By inspection (not by Quine-McClusky minimization algorithm), indicate a minimal prime implicant (PI) cover by circling the appropriate PI's on the Karnaugh Maps. e) Calculate the D flip-flop excitation maps. f) By inspection, indicate a minimal PI cover on these Karnaugh Maps. g) Derive logic designs for the machine from 'd' and 'f' .(AND , OR , NOT logic)...
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