ECE620_hw5 - input which clears the counter to an initial...

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EE 620 N Dr. R. ROOSTA H.W # 5 1) Design a fundamental mode circuit with two inputs x1 and x2, and a single output z. The circuit output is to be 0 whenever x1=0. The first change in the input x2, occurring while x1=1 will cause the circuit output to go to 1. The output is then to remain 1 until x1 returns to 0. Changes in inputs will always be separated sufficiently in time to permit the circuit to stabilize before a second input transition takes place. 2) Find the reduced state table for the machine you got for Q.1. 3) Consider an asynchronous counter with two binary inputs x1 and x2. The input x1=x2=0 is a reset
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Unformatted text preview: input which clears the counter to an initial state producing the output 00. Only a single input variable is allowed to change in a transition. The count is to be incremented by one when the input : x1,x2 = 01 is received and incremented by two when the input x1,x2 = 10 is received, the count being modulo 4. The input x1,x2 = 11 does not produce any change in the count. The outputs z1, z2 represent the current count. Find the primitive flow table for the asynchronous counter described above. 4) Find the universal 8-state connected row set state assignment ....
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