Week 2 Part 1

Week 2 Part 1 - EECE201 Project Integrated Program Module...

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1 11/01/2009 EECE201 PIP 1 EECE201 Project Integrated Program Module 2, Fall 2009 Week 2, part1: Optimized implementation of logic functions and combinational logic circuits Edmond Cretu Department of Electrical and Computer Engineering edmondc@ece.ubc.ca 11/01/2009 EECE201 PIP 2 Recall: Digital versus Analog “There are 10 kinds of people in this world: those who can deal in binary and those who can't.” (Frank Clarke)
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2 11/01/2009 EECE201 PIP 3 Digital versus Analog Main difference: processing symbols ({0,1}) versus processing signals! At the symbol level , there is a clear input-output propagation (no implicit feedback signals) At the physical level , binary symbols are mapped to voltage ranges (L, H), separated by an uncertain region Why? Robustness : giving up to a continuous set of values (signal representation) creates a noise immunity + possibility of exactly reconstructing digital signals contaminated with noise => easier to transmit and store information Abstraction : the higher degree of abstraction hides the complexity of some physical aspects (currents absorbed – fan-in and fan-out, power consumption, transient aspects of signal propagation) => it is easier to apply a structured design methodology => automatic methods to deal with the increasing complexity of circuits (automatic synthesis and layout of digital ICs) Programmability : easier to separate control from processing functions Advantage : higher circuit complexities (~10 6 -10 7 transistors/chip) can be achieved compared to analog design Disadvantages (relative to an analog implementation): higher power consumption, lower speeds 11/01/2009 EECE201 PIP 4 Main information processing aspects Generation and transduction (mapping physical domain -> symbol domain), Transmission (wires, transmission gates, buffers), Storing (memory blocks), Processing and control (logic and arithmetic circuits) Identification Modification Presentation Information flux Unit Unit Unit
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3 11/01/2009 EECE201 PIP 5 ++++++ ++++ ++++++ +++ ++++++ ++++++ ++++++ ++++++ +++++++++ +++++++++ +++++++++++ +++++++++++ Drain (type n) Source (type n) Substrate (type p) SiO 2 (a) When V GS = 0 V, the transistor is off V S 0 V = V G 0 V = V D ++++++ ++++++ ++++++ ++++++ ++++++ ++++ +++ ++++++ ++++++ ++++++ +++++++++ ++++++++++ +++++++++++ +++++++++++++++++ Channel (type n) SiO 2 VDD (b) When V GS = 5 V, the transistor is on ++ +++++++ V D 0V = V G 5V = V S 0V = At physical level: NMOS TRANSISTOR 11/01/2009 EECE201 PIP 6 Basic Boolean logic What primitive gates to choose? -> for a binary function with one output and two inputs there are … In general, for N input variables, we shall have Universal/canonic representations : any binary function can be represented in POS or SOP forms (AND + OR + NOT as primitive gates) • Link to physical implementation : any binary function could be implemented using only NAND gates (or dual representation: using OR gates) -> NAND/NOR gates are more “natural” for MOS and CMOS implementations
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This note was uploaded on 02/28/2010 for the course ECE 311 taught by Professor Leon during the Spring '10 term at UNBC.

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Week 2 Part 1 - EECE201 Project Integrated Program Module...

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