Week 4

Week 4 - 11/16/2009 EECE201 PIP, Module 2, Wk. 4 1...

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Unformatted text preview: 11/16/2009 EECE201 PIP, Module 2, Wk. 4 1 Synchronous Sequential Circuits. Finite State Machines Edmond Cretu Department of Electrical and Computer Engineering edmondc@ece.ubc.ca 11/16/2009 EECE201 PIP, Module 2, Wk. 4 2 Combinational vs. Sequential Two distinct behaviors relative to the input signals: Combinational circuits the output is strictly determined by the value of its input signals y=f(x 1 ,x 2 ,...,x n ) (functional programming) Sequential circuits the output is only partially determined by the evolution of its input signals -> the behavior depends on the previous sequence of received signals (history), memorized in the internal structure Exm: pocket calculator sequential or combinational? 0 w n 1 n inputs En Enable 2 n outputs y 0 y 2 n 1 w 0 w n 1 n inputs En Enable 2 n outputs y 0 y 2 n 1 w Men talk of killing time, while time quietly kills them. - Dion Boucicault How long a minute is, depends on which side of the bathroom door you're on. - Zall's Second Law 11/16/2009 EECE201 PIP, Module 2, Wk. 4 3 Why sequential circuits? Time very important parameter in the operation of a digital circuit theoretically, any function f:X->Y can be synthesized with a combinational circuit operating in ct. time -> price: the increased complexity of the circuit with increasing no. of inputs/outputs Why sequential alternative? compromise execution time/structural complexity => it allows a drastic reduction of the structural effort with a tolerable increase of the execution time useful for open, interactive systems, which react to external events Main distinction: the memory component present in sequential circuits gives them an increased degree of autonomy and a richer behavior the dependence on past history of the input signals is stored/condensed in the states of the sequential circuits -> Finite State Machines (FSM) 11/16/2009 EECE201 PIP, Module 2, Wk. 4 4 General structure of a sequential circuit W = { w 1 ,w 2 ,..w n } = inputs Z = { z 1 ,z 2 ,..,z n }=outputs y = { y 1 ,..,y k } = present- state variables Y = { Y 1 ,..Y k } = next- state variables Feedback path with delay elements y will take the values of Y after a time delay Combinational circuit Y k Y 1 y k y 1 w 1 w n z 1 z m Outputs Next-state variables Present-state variables Inputs Combinational circuit Y k Y 1 y k y 1 w 1 w n z 1 z m Outputs Next-state variables Present-state variables Inputs formal model 11/16/2009 EECE201 PIP, Module 2, Wk. 4 5 Synchronous vs. Asynchronous Asynchronous sequential circuit timing is implicit (outputs change according to an internal time management, embedded into the structure) race problem, better low-power performance Synchronous sequential circuits a clock signal is used to control the operation => splitting between how? and when? easier to design 11/16/2009 EECE201 PIP, Module 2, Wk. 4EECE201 PIP, Module 2, Wk....
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This note was uploaded on 02/28/2010 for the course ECE 311 taught by Professor Leon during the Spring '10 term at UNBC.

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Week 4 - 11/16/2009 EECE201 PIP, Module 2, Wk. 4 1...

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