midtermreview - ReviewLecture ECE412

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Adaptive Integrated Microsystems Review Lecture ECE 412 Introduction to mixed-signal circuits (Fall 2007) Class website: http://www.egr.msu.edu/classes/ece412/shantanu
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Adaptive Integrated Microsystems nMOS operation - After the channel is formed, if a voltage is applied across drain to source terminal, current flows. - When the gate-to-source voltage increases more than a threshold voltage, a channel is formed between the source and the drain, and current can flow.
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Adaptive Integrated Microsystems nMOS and pMOS transistors - Four terminals (for nMOS and pMOS transistors) - Gate (G), drain (D), source (S) and bulk (B). - nMOS bulk always connected to lowest potential (gnd). - pMOS bulk always connected to highest potential (Vdd). nMOS transistor pMOS transistor
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Adaptive Integrated Microsystems Symbols - For nmos transistor current flows from the drain to the source. - For pmos transistor current flows from the source to the drain. - DC current CANNOT flow into the gate of a transistor.
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Adaptive Integrated Microsystems Transistor operation Active Region Once gate to source voltage is fixed, the drain current is approximately fixed ds I d V s V Drain Source Triode Region ] 2 1 ) [( 2 ds ds th gs L W ox n ds V V V V C I - - = μ 2 2 ) ( th gs L W ox n ds V V C I - = μ
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Adaptive Integrated Microsystems Large signal model ) 1 ( ) ( 2 2 DS TH GS ox n D V V V L W C I λ μ + - = Saturation region
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Adaptive Integrated Microsystems Small signal model V V r g g th ds d m 7 . 0 10 1 10 1 8 1 6 = = = = - - - - Bias Point Linear operation Small signal model is an approximation about the bias point o I gs m V g ds r d V s V gs V
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Adaptive Integrated Microsystems Small signal parameter V V g g th d m 7 . 0 10 10 1 8 1 6 = = = - - - - Bias Point Linear operation Bias point for a transistor is determined by its drain current and gate-to-source voltage o I TH GS o m V V I g - = 2 o TH GS ox n DS D D DS ds I V V L W C V I I V r λ μ 1 ) ( 2 1 / 1 2 = - = = = o d I g =
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Adaptive Integrated Microsystems Saturation Criterion 1 eff V 2 eff V th gd V V ds th gs V V V - eff V Condition for saturation Typical value of V V eff 4 . 0
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Adaptive Integrated Microsystems Small Signal Models s V d V g V ds I g V d V s V ds I Change in drain current when gate- to-source voltage changes gs m ds V g I = ds d gs m ds V g V g I + = By superposition principle ) ( ) ( s d d s g m ds V V g V V g I - + - = s d m d d g m ds V g g V g V g I + - + = ) ( s d m d d g m ds V g g V g V g I + + - - = ) ( ds d ds V g I = Change in drain current when drain- to-source voltage changes
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Adaptive Integrated Microsystems Important concepts to remember nMOS transistor pMOS transistor - Bulk or substrate connected to ground (lowest potential). - When gate voltage increases the drain current increases.
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This note was uploaded on 03/01/2010 for the course ECE 412 taught by Professor - during the Fall '08 term at Michigan State University.

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midtermreview - ReviewLecture ECE412

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