freqanalysisamplifierpartI

freqanalysisamplifierpartI -...

Info iconThis preview shows pages 1–7. Sign up to view the full content.

View Full Document Right Arrow Icon
Adaptive Integrated Microsystems Frequency analysis of signal stage amplifiers  (Chapter 3: section 3.11) ECE 412 Introduction to mixed-signal circuits (Fall 2007) Class website: http://www.egr.msu.edu/classes/ece412/shantanu
Background image of page 1

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full DocumentRight Arrow Icon
Adaptive Integrated Microsystems Conceptual interpretation of poles and zeros Poles are associated with number of internal nodes that need to be charged. This circuit has three poles. But no zeros !!! Zeros are associated by different ways in which a signal can nullify itself at the output. The circuit has one zero. REMEMBER: Paths should have different delays to nullify.
Background image of page 2
Adaptive Integrated Microsystems Location of poles and zeros Frequency analysis of most analog circuit can be mapped onto three basic topologies. ) ( s I R out V C ) 1 ( ) ( ) ( RCs s RI s V out + = A current source charging a parallel combination of resistance and capacitance leads to a pole. Location of the pole is dependent on R and C. RC s 1 - = This is equivalent to frequency RC p 1 = ϖ
Background image of page 3

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full DocumentRight Arrow Icon
Adaptive Integrated Microsystems Location of poles and zeros ) ) )( || ( 1 ( )] ( ) ( )[ || ( ) ( 2 1 2 1 1 2 2 1 s C C r r s I s I r r s V out + + - = The output voltage is dependent on the difference of the two currents. The location of the pole is dependent on the total resistance at the output node and total capacitance at the output node. I1(s) = I2(s) leads to a zero. ) ( 2 s I ) ( s V out dd V ) ( 1 s I 1 r 2 r 2 C 1 C ) )( || ( 1 2 1 2 1 C C r r s + - =
Background image of page 4
Adaptive Integrated Microsystems Miller’s theorem ) 1 ( 1 v F A C Z - = F v F C A C Z - = - ) 1 ( 1 2 Input capacitance Output capacitance REMEMBER that the feedback capacitor could lead to a zero if there is a delay between two paths. A feedback capacitor can be decomposed into un-coupled impedance.
Background image of page 5

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full DocumentRight Arrow Icon
Adaptive Integrated Microsystems AC model for MOS transistors Small signal Model Parasitic capacitors Small signal AC model pF C pF C pF C db gd gs 02 . 0
Background image of page 6
Image of page 7
This is the end of the preview. Sign up to access the rest of the document.

Page1 / 24

freqanalysisamplifierpartI -...

This preview shows document pages 1 - 7. Sign up to view the full document.

View Full Document Right Arrow Icon
Ask a homework question - tutors are online