L02_MIPS Introduction - MIPS: register-to-register, three...

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MIPS: register-to-register, three address MIPS is a register-to-register , or load/store , architecture — destination and sources of instructions must all be registers — special instructions to access main memory (later) MIPS uses three-address instructions for data manipulation — each ALU instruction contains a destination and two sources For example, an addition instruction (a = b + c) has the form: add a , b, c operation operands destination sources 1
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MIPS register file MIPS processors have 32 registers, each of which holds a 32-bit value — register addresses are 5 bits long More registers might seem better, but there is a limit to the goodness: — more expensive: because of registers themselves, plus extra hardware like muxes to select individual registers — instruction lengths may be affected 2 gy D data Write 32 D address 32 32 Register File 5 A address B address A data B data 5 5 2 2 2 32 32
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MIPS register names MIPS register names begin with a $ . There are two naming conventions: — by number: $0 $1 $2 $31 — by (mostly) two-character names, such as: $a0-$a3 $s0-$s7 $t0-$t9 $sp $ra Not all of the registers are equivalent: — e.g., register $0 or $zero always contains the value 0 — some have special uses, by convention ( $sp holds “stack pointer”) You have to be a little careful in picking registers for your programs — for now, stick to the registers $t0-$t9 3
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Basic arithmetic and logic operations The basic integer arithmetic operations include the following: add sub mul div And here are a few bitwise operations: p and or xor nor emember that these all require three register operands; for example: Remember that these all require three register operands; for example: add $t0, $t1, $t2 # $t0 = $t1 + $t2 ul s1, $s1, $a0 $s1 = $s1 a0 mul $s1, $s1, $a0 # $s1 $s1 x $a0 4
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Larger expressions Complex arithmetic expressions may require multiple MIPS operations Example: t0 (t1 t2) (t3 t4) add $t0, $t1, $t2 # $t0 contains $t1 + $t2 sub $t6, $t3, $t4 # temp value $t6 = $t3 - $t4 mul $t0, $t0, $t6 # $t0 contains the final product Temporary registers may be necessary, since each MIPS instructions can
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This note was uploaded on 03/04/2010 for the course CS 373 taught by Professor Kuma during the Spring '10 term at University of Illinois at Urbana–Champaign.

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L02_MIPS Introduction - MIPS: register-to-register, three...

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