Lecture-07 - EEE 525: VLSI Design, L-07 Process and Design...

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1 EEE 525: VLSI Design, L-07 Process and Design Variability Spring 2010, ASU Yu (Kevin) Cao, yu.cao@asu.edu , GWC 336 Highlight Sources of uncertainties Static process variations Aging effects Design uncertainties Impact on design and design methodology Reading: Chapter 4 EEE525, ASU, Y. Cao Lecture 07 - 2 -
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2 Highlight Sources of uncertainties Static process variations Aging effects Design uncertainties Impact on design and design methodology Reading: Chapter 4 EEE525, ASU, Y. Cao Lecture 07 - 3 - Reliability of Electronics For electronic design, reliability means the successful control of failure rates and performance degradation EEE525, ASU, Y. Cao Lecture 07 - 4 -
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3 Life Time of a System I Infant Mortality II Useful Life III Aging Screening Manage Design Overall life characteristics Design related failures Quality failures Aging (wearout) Failure Rate System life time F Time [B. E. Hegler, Potential 1988] EEE525, ASU, Y. Cao Lecture 07 - 5 - Increased Reliability Concerns An inevitable result of aggressive scaling No convenient solution from CMOS technology! Chemical effects Static fluctuations Temporal degradation (aging) Thermal effects Mechanical effects [M. Kole, BMAS 2007] 10 -12 s1 0 -8 0 -4 0 0 0 4 0 8 s Dynamic electronic signals EEE525, ASU, Y. Cao Lecture 07 - 6 -
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4 Issues in Nano-Scale Technologies Electrical Behavior / Parameter Variation Spatial Temporal Random: RDF, LER, etc Systematic: Process Gradients et Aging: NBTI, HCI, Electrom et Transient: SET/SEU, Noise, etc Designer must consider both Process and Temporal Variations Gradients, etc Electrom., etc EEE525, ASU, Y. Cao Lecture 07 - 7 - Intrinsic Static Variations Limited by fundamental physics; random in nature The lower bound of variations RDF RTN + T ox LER Random Dopant Fluctuations, Line Edge Roughness, Oxide Thickness Fluctuations, Random Telegraph Noise, and their interactions ! EEE525, ASU, Y. Cao Lecture 07 - 8 -
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5 Random Dopant Fluctuations The randomness in the location of and the amount of channel dopants Directly impacts threshold voltage (V th ) 600 32nm (W/L)=2 20 40 60 100 200 300 400 500 Channel dopants
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Lecture-07 - EEE 525: VLSI Design, L-07 Process and Design...

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