Ch3_PowerBasics - Power and Energy Basics Jan M Rabaey Low...

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Low Power Design Essentials ©2008 3 Jan M. Rabaey Low Power Design Essentials ©2008 Chapter 3 Power and Energy Basics
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Low Power Design Essentials ©2008 3 Chapter Outline § Metrics § Dynamic power § Static power § Energy-delay trade-off’s
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Low Power Design Essentials ©2008 3 Metrics § Delay (sec): Performance metric § Energy (Joule) Efficiency metric: effort to perform a task § Power (Watt) Energy consumed per unit time § Power*Delay (Joule) Mostly a technology parameter – measures the efficiency of performing an operation in a given technology § Energy*Delay = Power*Delay2 (Joule-sec) Combined performance and energy metric – figure of merit of design style § Other Metrics: Energy-Delayn (Joule-secn) Increased weight on performance over energy
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Low Power Design Essentials ©2008 3 Where is Power Dissipated in CMOS? § Active (Dynamic) power (Dis)charging capacitors Short-circuit power § Both pull-up and pull-down on during transition § Static (leakage) power Transistors are imperfect switches § Static currents Biasing currents
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Low Power Design Essentials ©2008 3 Active (or Dynamic) Power Sources: § Charging and discharging capacitors § Temporary glitches (dynamic hazards) § Short-circuit currents Key property of active power: f P dyn with f the switching frequency
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Low Power Design Essentials ©2008 3 Charging Capacitors 2 1 0 CV E = 2 2 1 CV E R = R C V 2 2 1 CV E C = Applying a voltage step Value of R does not impact energy!
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Low Power Design Essentials ©2008 3 Applied to Complementary CMOS Gate § One half of the power from the supply is consumed in the pull-up network and one half is stored on CL § Charge from CL is dumped during the 10 transition § Independent of resistance of charging/discharging network V dd V out i L C L PMOS NETWORK NMOS A 1 A N NETWORK 2 1 0 DD L V C E = 2 2 1 DD L R V C E = 2 2 1 DD L C V C E =
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Low Power Design Essentials ©2008 3 Circuits with Reduced Swing C 0 V - V TH V 0 →V E 0®1 = VC 0 ¥ ò dV C dt dt = CV dV C 0 V - V T ò = CV ( V - V TH ) Energy consumed is proportional to output swing
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Low Power Design Essentials ©2008 3 Charging Capacitors - Revisited R C E E E + = 1 0 2 ) ( CV T RC E R = R C I 2 2 1 CV E C = Driving from a constant current source 2 2 0 ) ( ) ( CV T RC T RI dt RI I E I CV T R = = = = Energy dissipated in resistor can be reduced by increasing charging time T (that is, decreasing I )
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Low Power Design Essentials ©2008 3. Charging Capacitors Using constant voltage or current driver? Energy dissipated using constant current charging can be made arbitrarily small at the expense of delay: Adiabatic charging Econstant_current < Econstant_voltage if T > 2 RC Note: tp (RC) = 0.69 RC t 0→90%(RC) = 2.3 RC
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Low Power Design Essentials ©2008 3. Charging Capacitors Driving using a sine wave (e.g. from resonant circuit) Energy dissipated in resistor can be made arbitrarily small if frequency ϖ << 1/RC (output signal in phase with input sinusoid) R C v(t) 2 2 1 CV E C =
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Low Power Design Essentials ©2008 3.
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