3 - InstructionDecoder IR PC Address Bus DataBus MAR CPUBus...

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Instruction Decoder IR PC MAR MDR R0 Rn-1 Y ALU Z Address  Bus Data Bus CPU Bus A B Control Lines Clear Y
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Step RTL Control Sequence T1 MAR PC; PC PC+1 PC out , MAR in , Clear Y, Set Carry in of ALU, ADD, Z in , READ T2 Wait Z out , PC in , Wait for MFC T3 IR MDR MDR out , IR in Ex: Add contents of a memory  location to register R1 - Instruction Fetch
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Step RTL Control Sequence T4 MAR IR Addr-field of IR out , MAR in , READ T5 Y R1 R1 out , Y in , Wait for MFC T6 Z Y + M[MAR] MDR out , ADD, Z in T7 R1 Z Z out , R1 in , END Ex: Add contents of a memory  location to register R1
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Step RTL Control Sequence T1 MAR PC; PC PC+1 PC out , MAR in , Clear Y, Set Carry in of ALU, ADD, Z in , READ T2 Wait Z out , PC in , Wait for MFC T3 IR MDR MDR out , IR in Ex: Branch by an offset x
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Step RTL Control Sequence T4 Y PC PC out , Y in T5 Z Y + [x of IR] ADD, Z in Addr-field of IR out T6 PC Z Z out , PC in , END Ex: Branch by an offset x
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Ex: CALL absolute address -Address fetched along with  instruction
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Step RTL Control Sequence T1 MAR PC; PC PC+1 PC out , MAR in , Clear Y, Set Carry in of ALU, ADD, Z in , READ T2 Wait Z out , PC in , Wait for MFC T3 IR MDR MDR out , IR in T4 Z SP-1 Set Y, SP out , ADD, Z in T5 SP Z, MAR Z Z out, ,MAR in , , SP in T6 MDR PC MDR in , PC out , WRITE T7 PC IR PC in , Addr-field of Ir out , Wait for MFC, END Ex: CALL absolute address
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Design of CLU - Hard wired design - Microprogrammed design
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HARDWIRED CONTROL UNIT
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Hard-wired Control Unit - The opcode field of IR. This field is decoded to provide the encoder information about instruction being decoded - Signals from status and condition - Control step information ( Step generator for T1, T2, ….) - External signals such as start, MFC, interrupts etc.
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Control signal generator generates Individual control signals. Ex: Zin = T1 + T6.ADD + T5. BR + …. - IMPLEMENTED AS A COMBINATIONAL CIRCUIT .
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Combinational design could be using PLDs. Hard wired logic difficult to implement changes Provides faster execution. - Another approach Microprogrammed control unit
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Microprogrammed Unit - Sequence of microinstructions corresponding to each instruction is stored in ROM called Control Memory - Called Microprogram - Provides flexibility of implementation - Less hardware
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Micro instruction word is the word whose bits represent control signals Ex: Y R1 ; R1 out , Y in , Wait for MFC Z Y + MDR ; MDR out , ADD, Z in R1 Z ; Z out , R1 in , END
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Step :R1in R1out Yin Zin Zout MDRout ADD WMFC END 1 0 1 1 0 0 0 0 1 0 1 0 0 0 1 0 1 1 0 0 7 1 0 0 0 1 0 0 0 1
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Microprogramming Types Horizontal Microprogramming Vertical Microprogramming
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3 - InstructionDecoder IR PC Address Bus DataBus MAR CPUBus...

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