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Unformatted text preview: Occam's razor entities must not be multiplied beyond necessity In razor t ragedy, we t rade-offer between timing error and energy saving. In this thesis, we propose the first application of a low-overhead, “let fail and correct” technique to general-purpose computing In this thesis, we propose the first application of a low-overhead, “let fail and correct” technique to general-purpose computing are speculatively executed under the assumption that they would meet the setup and holdtime requirements for a given clock cycle. A timing mis-speculation leads to a delay error which is detected by comparing the speculative execution output against worst-case assumptions. Thus, computational correctness i n Razor is achieved not through worst-case safety margins but rather t hrough in situ detection and recovery mechanisms in the presence of e rrors. The key idea of Razor is to tune the supply voltage by monitoring the error r ate during operation. Allowing error-tolerant processor operation enables elimination of worstcase safety margins, thereby leading to significant improvements in energy efficiency ASICS Application-Specific Integrated ªCircuit˜ 7 ç x * ´ £ -p+ 7 3q ³ S * ª ´ r F z F$ $ F ) à $ F P $ ) ï + pzr´ª* ª ´¹ •¨ K Y˜ ASIC S F I$/ + @ @7 ASIC S ASICr@F$ H+$ @ p 7 + @ ¯ ‹ Î ƒ F+ ASIC SoC S ASIC K Y ˜ F $ ) $ ï + F pF) à P F$ $ F $ * ) $ ï ª + ´ F r pF) à P * ª ´ r$ zz F$ F $ * ) $ ï ª + ´ F r pF) à P * ª ´ r$ zz F$ K Y˜ Û ˜ Verilog S % * á Vµ HDLx¬ + 7 P ª 7 ç+ 7 * ª “r z ´ ”z * ª ´ r “ Place & Route” GDS-II p + 7 ³3 + 7 ³3 q ˜ F $ ”) • ¨ * ª ”´ F “@ $) ª ´ “¹ ª ´ r * z ª ”rz ´ ”çx ASICf$ CÖ7 F * + “ ”Ì + 7 ¬ R € $ + “@ “ + 7 p" ³ S 2000 È yÝ ASICA +xá¨7a+ * ª µ 7 ç ¬ P7 % ASICA x ´£3237 ³+ p 5000 S ˜ @@ 7 $FI+ F I$ C/IH + 7@ @@ CPU8 :à ...
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- Spring '10