hw6_soln_2010

hw6_soln_2010 - Homework#6 ECE 15a Winter 2010 1(5p Realize...

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Homework #6 ECE 15a Winter 2010 1. (5p) Realize Z=abc+bcde + ad using only 2-input NOR gates. Use as few gates as possible. Z = bc (a+de) + ad NOR implementation: Replace NOT gate using NOR gate:
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2. (5p) Convert the circuit shown in Figure 1 to all NAND gates, by adding bubbles and inverters where necessary. 3. (5p) Convert the circuit shown in Figure 1 to all NOR gates, by adding bubbles and inverters where necessary.
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4. (5p) Realize Z=bc’(a+d+eg(f’+h)) using NOR gates. Add inverters if necessary. Using NOR Gates:
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5. Consider the following function: F(a,b,c,d) = ∑m(1,5,6,7,14,15) (a) (5p) Find two different minimum circuits which implement F using AND and OR gates. Identify all hazards in each circuit. a’b’ a’b ab ab’ c’d’ c’d 1 1 cd 1 1 cd’ 1 1 The minimum solution in AND/OR representation is: F = a’c’d + bc Here, there is a static-1 hazard due to the variable c and c’ that occurs in two terms of F. a+b
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This note was uploaded on 03/17/2010 for the course ECE 15A taught by Professor M during the Spring '08 term at UCSB.

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hw6_soln_2010 - Homework#6 ECE 15a Winter 2010 1(5p Realize...

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