Unformatted text preview: LD -t - = 6,<) v' 9 3. Assign the testing signals for measuring the propagation delay: show the input signals revealing the propagating delay by placing checkmarks in the table. You have a square-wave generator, a DC source and ground for high and low logic levels. 4. Complete the timing diagram one should expect on the logic analyzer display. Show the propagation delays for signals Fl, F2, and A. ID Inputs Square' wave sisnal Logic I 6+5V) Logic (GND) w D E X P Input F1 F2 A 120 t, ns...
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- Spring '08
- Algebra, propagation delay, circuit propagation delay