tarea - * Circuit Extracted by Tanner Research's L-Edit...

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* Circuit Extracted by Tanner Research's L-Edit V7.12 / Extract V4.00 ; * TDB File: C:\Users\juanchirilin\Uniandes\Segundo semestre\DIGITALES\L- edit\archivos TDB\cascadainversor, Cell: Cell0 * Extract Definition File: C:\Users\juanchirilin\Uniandes\Segundo semestre\DIGITALES\L-edit\tecnologias\CNM25\CNM25.EXT * Extract Date and Time: 09/07/2009 - 13:27 * * WARNING: Layers with Unassigned FRINGE Capacitance. * <EXT-Capacidad poly> * WARNING: Layers with Zero Resistance. * <EXT-Capacidad poly> * * NODE NAME ALIASES * 1 = Vdd (-45,28) * 2 = Gnd (-44.25,-17.75) * 3 = Out1 (-1.25,-4.75) * 4 = Out2 (-35.25,-4.25) * 5 = Out3 (-58.5,3.5) * 6 = Out (33.5,-5) * 7 = In (62.25,3.5) * * THESE ARE TYPICAL SCNA SPICE LEVEL 2 PARAMETERS .model PMOS PMOS LEVEL = 2 + TOX = 380E-10 VTO = -1.139 NSUB = 1.355E16 UO = 212.7 + UCRIT = 1E4 UEXP = .1159 NFS = 662.4E9 WD = .4268E-6 + DELTA = 1.824 RS = 134.9 LD = .8101E-6 XJ = 2.783E-9 + VMAX = 120.3E3 NEFF = .06665 CJ = 3.816E-4 MJ = .3499 + CJSW = 7.384E-10 MJSW = .3916
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tarea - * Circuit Extracted by Tanner Research's L-Edit...

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