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CSM51Ach9-1 - STANDARD COMBINATIONAL MODULES 1 DECODERS...

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1 STANDARD COMBINATIONAL MODULES DECODERS ENCODERS MULTIPLEXERS (Selectors) DEMULTIPLEXERS (Distributors) SHIFTERS Introduction to Digital Systems 9 – Standard Combinational Modules
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2 BINARY DECODERS HIGH-LEVEL DESCRIPTION: Inputs: x = ( x n - 1 , . . . , x 0 ) , x j ∈ { 0 , 1 } Enable E ∈ { 0 , 1 } Outputs: y = ( y 2 n - 1 , . . . , y 0 ) , y i ∈ { 0 , 1 } Function: y i = 1 if ( x = i ) and ( E = 1) 0 otherwise x = n - 1 X j =0 x j 2 j and i = 0 , . . . , 2 n - 1 Introduction to Digital Systems 9 – Standard Combinational Modules
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3 0 1 2 y 0 y 1 y 2 n-Input Binary Decoder 2 n -1 Outputs Inputs E y 2 n -1 En 0 x 0 1 x 1 n-1 x n-1 Figure 9.1: n -INPUT BINARY DECODER. Introduction to Digital Systems 9 – Standard Combinational Modules
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4 EXAMPLE 9.1: 3-INPUT BINARY DECODER E x 2 x 1 x 0 x y 7 y 6 y 5 y 4 y 3 y 2 y 1 y 0 1 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 1 1 0 0 0 0 0 0 1 0 1 0 1 0 2 0 0 0 0 0 1 0 0 1 0 1 1 3 0 0 0 0 1 0 0 0 1 1 0 0 4 0 0 0 1 0 0 0 0 1 1 0 1 5 0 0 1 0 0 0 0 0 1 1 1 0 6 0 1 0 0 0 0 0 0 1 1 1 1 7 1 0 0 0 0 0 0 0 0 - - - - 0 0 0 0 0 0 0 0 BINARY SPECIFICATION: Inputs: x = ( x n - 1 , . . . , x 0 ) , x j ∈ { 0 , 1 } E ∈ { 0 , 1 } Outputs: y = ( y 2 n - 1 , . . . , y 0 ) , y i ∈ { 0 , 1 } Function: y i = E · m i ( x ) , i = 0 , . . . , 2 n - 1 Introduction to Digital Systems 9 – Standard Combinational Modules
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5 EXAMPLE 9.2: IMPLEMENTATION OF 2-INPUT DECODER y 0 = x 0 1 x 0 0 E y 1 = x 0 1 x 0 E y 2 = x 1 x 0 0 E y 3 = x 1 x 0 E E y 0 y 1 y 2 y 3 x 0 x 1 Figure 9.2: GATE NETWORK IMPLEMENTATION OF 2-INPUT BINARY DECODER. Introduction to Digital Systems 9 – Standard Combinational Modules
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6 DECODER USES 4-Input Binary Decoder 15 . . . 4 3 2 1 0 En E=1 LOAD STORE ADD JUMP OPCODE field Other fields Instruction Decoded operations Figure 9.3: OPERATION DECODING. Introduction to Digital Systems 9 – Standard Combinational Modules
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7 DECODER USES Binary Decoder 0 1 2 16383 14 Address Read/write Data input Data output Binary cell 00000000000010 Cell referenced when address is (b) RAM Module (2 x 1) 14 14 Address Read/write Data input Data output (a) E=1 Figure 9.4: RANDOM ACCESS MEMORY (RAM): a) MODULE; b) ADDRESSING OF BINARY CELLS. Introduction to Digital Systems 9 – Standard Combinational Modules
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8 BINARY DECODER AND or GATE UNIVERSAL Example 9.5: x 2 x 1 x 0 z 2 z 1 z 0 000 0 1 0 001 1 0 0 010 0 0 1 011 0 1 0 100 0 0 1 101 1 0 1 110 0 0 0 111 1 0 0 Introduction to Digital Systems 9 – Standard Combinational Modules
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9 ( y 7 , . . . , y 0 ) = dec ( x 2 , x 1 , x 0 , 1) z 2 ( x 2 , x 1 , x 0 ) = y 1 y 5 y 7 z 1 ( x 2 , x 1 , x 0 ) = y 0 y 3 z 0 ( x 2 , x 1 , x 0 ) = y 2 y 4 y 5 0 1 2 3 4 5 6 7 0 1 2 y 0 y 1 y 2 y 3 y 4 y 5 y 6 y 7 x 0 x 1 x 2 z 0 z 1 z 2 Binary Decoder En E=1 Figure 9.5: NETWORK IN EXAMPLE 9.5 Introduction to Digital Systems 9 – Standard Combinational Modules
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10 DECODER NETWORKS: COINCIDENT DECODING x = ( x left , x right ) x left = ( x 7 , x 6 , x 5 , x 4 ) x right = ( x 3 , x 2 , x 1 , x 0 ) x = 2 4 × x left + x right y = DEC ( x left ) w = DEC ( x right ) z i = AND ( y s , w t ) i = 2 4 × s + t Introduction to Digital Systems 9 – Standard Combinational Modules
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11 z 0 z 255 z 36 w 4 y 2 4-Input Binary Decoder En x 3 x 2 x 1 x 0 1 15 . . .4 3 2 1 0 0 1 0 0 4-Input Binary Decoder 15 . . . 2 1 0 En x 7 x 6 x 5 x 4 E 0 0 1 0 1 1 1 Figure 9.6: 8-INPUT COINCIDENT DECODER.
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