hw2 - [CSM51A W09] Assignment 2 Assigned: 01/19/09, Due:...

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Unformatted text preview: [CSM51A W09] Assignment 2 Assigned: 01/19/09, Due: 01/26/09 TAs: Pouya Dormiani (pouya@cs.ucla.edu), Gabriel Pan (pansh@cs.ucla.edu) Rules of Engagement: Exercises are for your practicesolutions are provided so you can check your work. Homework problems must be submitted on the specified due date before lecture starts. Once lecture starts, a homework is considered late and will not be accepted. Please write legibly and follow directions. Exercises From the book: 3.2, 3.6, 3.8, 3.11 Homework Problems (35 points total) Problem 1 (5 points) We have a logic family which uses the values in the following table as the representation of binary values. Voltage(V) V Hmax 5.0 V Hmin 3.5 V Lmax 1.5 V Lmin 0.0 The following table shows the results of some measurements on a circuit. x 1 and x are inputs and z is the output measurement. All units are in volts(V). x 1 x z 0.7 0.6 0.3 0.6 4.9 0.3 1.4 1.4 0.4 3.9 4.5 4.6 3.8 1.3 0.2 What type of gate does this circuit implement? Show for both positive and negative logic.What type of gate does this circuit implement?...
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This note was uploaded on 03/26/2010 for the course CS 187154200 taught by Professor Ercegovac,m.d. during the Winter '09 term at UCLA.

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hw2 - [CSM51A W09] Assignment 2 Assigned: 01/19/09, Due:...

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