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Unformatted text preview: CSCI 120 Introduction to Computation Homework 5 Due 04/16/09 Saad Mneimneh Visiting Professor Hunter College of CUNY PART 1: Pipelining... Consider a machine with the following machine cycle: Fetch: instruction is fetched Decode: instruction is decoded Execute: instruction is executed Write-back: result is written back to memory Therefore, a normal (non-pipelined) execution will look like the following: F D E WB F D E WB F D E WB F D E WB F D E WB F D E WB ... Since both fetch and write-back access memory, they cannot be performed si- multaneously. Show how a pipelined machine cycle will look like using 9 in- structions. How much speedup is gained over the non-pipelined execution? PART 2: Cache memory The CSCI 120 teacher collected all the tests and went to his office in HN 1090F. Few seconds after being in the office, he received a call on his cell phone from his wife to come home, so he left the building carrying the tests with him. He got into a cab on 68 th street and Lexington avenue and went home. At home,street and Lexington avenue and went home....
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- Spring '09