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Unformatted text preview: CSCI 120 Introduction to Computation Homework 5 Solution Saad Mneimneh Visiting Professor Hunter College of CUNY PART 1: Pipelining... Consider a machine with the following machine cycle: Fetch: instruction is fetched Decode: instruction is decoded Execute: instruction is executed Write-back: result is written back to memory Therefore, a normal (non-pipelined) execution will look like the following: F D E WB F D E WB F D E WB F D E WB F D E WB F D E WB ... Since both fetch and write-back access memory, they cannot be performed si- multaneously. Show how a pipelined machine cycle will look like using 9 in- structions. How much speedup is gained over the non-pipelined execution? Heres one possibility F D E WB F D E WB F D E WB F D E WB F D E WB F D E WB F D E WB F D E WB F D E WB The speedup is 36/18=2. Heres another: F D E WB F D E WB F D E WB F D E WB F D E WB F D E WB F D E WB F D E WB F D E WB The speedup is 36/20=1.8. In both cases, when the number of instruction is large, the speedup approaches 2....
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This note was uploaded on 03/27/2010 for the course CSCI 120 taught by Professor Saadmneimneh during the Spring '09 term at CUNY Hunter.
- Spring '09