EE357Unit4a_ColdfireISA

EE357Unit4a_ColdfireISA - EE 357 Unit 4a Instruction Set...

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© Mark Redekopp, All rights reserved EE 357 Unit 4a Instruction Set Architecture
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© Mark Redekopp, All rights reserved Instruction Set Architecture (ISA) Defines the software interface of the computer system Instruction set is the “vocabulary” that the HW can understand and that SW is composed with 2 approaches Large, rich vocabulary More work per instruction but slower HW RISC = Reduced instruction set computer (MIPS / PPC / ARM) Small, basic, but sufficient vocabulary Less work per instruction but faster HW
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© Mark Redekopp, All rights reserved Which is better? Exec. Time of a Program = Time to do all operations/work With CISC: (Work/Instruc .) = ↑ while (Time / Instruc .) ↑ With RISC: (Work/Instruc ) = ↓ while (Time / Instruc .) ↓ One is not inherently better, though most computers at the HW level implement RISC-style instructions because fewer operations per instruction makes the HW easier to design. Instruc Time Instruc Work TotalWork Time 1
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Mem. Inst. Computer Organization Overview • A processor has to… Read instructions from memory Read necessary data into registers Fast storage locations inside the processor used to store values as the processor operates on them Perform operations on the data Write data back to memory or I/O device Proc. A
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This note was uploaded on 04/04/2010 for the course EE 357 taught by Professor Mayeda during the Spring '08 term at USC.

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EE357Unit4a_ColdfireISA - EE 357 Unit 4a Instruction Set...

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