QUIZZ2_SOLUTION

QUIZZ2_SOLUTION - Neatly complete the timing diagram on the...

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Sheet1 Page 1 ECE 212 Quiz 1 p 1 of2 D:\ECE212\Quiz\212Spr10\Q01\q01_SLN.docx NAME: SOLUTIONS 01/29/10 Quiz 1 (10 minutes) 1. The system below has a Data Path with three registers (A, B, C), a binary adder and a 4-bus to 1-bus multiplexer. The multiplexer input selection is specified by the values of S1, S0. Also shown is a portion of the State Transition Diagram for the Control Circuit.
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Unformatted text preview: Neatly complete the timing diagram on the next page. Assume that: The initial register contents are as shown in the timing diagram. The Control Circuit begins in State1. All flip-flops, both in the Control Circuit and the registers, are rising-edge triggered. A ECE 2212 Quiz 1 p 2 of2 2212 Quiz 1 p 2 of2 Solutiion: S...
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This note was uploaded on 04/05/2010 for the course ECE 212 taught by Professor Greco during the Spring '08 term at Lafayette.

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