ECE-L304 Lecture 72Step by StepStep 1 Review of ADC and DAC Step 2 Build the ADC circuit Step 3 Build the DAC circuit Step 4 Introduce static RAMStep 5 Introduce control logic Step 6 Build the on-board clockStep 7 Final changes
ECE-L304 Lecture 73Step 4 ReviewWhat did we learn?Stable address, stable data, write590 counters have an error when CCK=RCKThere is a propagation delay through 590 counter (how big?)Simple control (FlipFlop-based) is effective in controlling mode (RAM read/write)
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ECE-L304 Lecture 74Step 4 DeliverablesPart 1 Schematic, SimulationPlot A[15-0], W[7-0], RW1, RW0, R[7-0] vs time over span of 0 to 4 usPart 2 Schematic, SimulationPlot W[7-0], R[7-0], WE, RE, RCO, AIN, AOUT vs time over one complete read/write cycleAnswer questions[Extra credit] Correct the timing flaw in the 590 count at the transition from write to read?