hw3 - EE 101 Handout#4 Prof A El Gamal Homework...

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Unformatted text preview: EE 101 Handout #4 Prof. A. El Gamal Jan 23, 2003 Homework Assignment #3 Due: Thursday 1/30 1. Consider the bipolar transistor circuit in the following figure. Assume the simple model, i b = i ( e v be /v T- 1) and i c = βi b , where i = 10- 14 A, v T = 26mV, and β = 100. Find v out . 1kΩ 50kΩ v out 5V 2. Consider the bipolar transistor circuit in the following figure. Find R assuming the same model as in Problem 1 with i = 10- 15 A, v T = 26mV, and β = 50. R 4mA 5V 1 3. In this problem you will use the MOS transistor switch model discussed in the lecture notes to find the truth table for the CMOS logic gate shown in the following figure. v dd A A B B Y Assume that logic level ‘1’ is represented by the voltage level v dd V and logic level ‘0’ is represented by the voltage level 0V, i.e. , ground. The truth table is of the form: B A Y 1 1 1 1 Draw the equivalent circuit (assuming the MOS switch model) for each case and com- plete the truth table, i.e. , find the Y value for each input combination.value for each input combination....
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This note was uploaded on 04/06/2010 for the course EE 102 taught by Professor Pingli during the Fall '08 term at Shanghai Jiao Tong University.

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hw3 - EE 101 Handout#4 Prof A El Gamal Homework...

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