Unformatted text preview: factor of 4. If a 1 Ghz processor is not pipelined, what must its clock rate become in order to make up for it? With the new clock rate then and an instruction rate efficiency of 50%, what becomes its instruction rate? 4)An OR is formed between the two outputs of the SR flip-flop resulting at point Z. What is the Boolean algebraic expression relating Z to inputs S and R? Use Q and NQ as the outputs of the flip-flop. Why is this meaningless? Show by means of a truth table. 5) A DRAM transistor cell is initially supplied with Vcc. When time reaches its time constant, what amount of capacitor voltage in terms of V CC will be left?...
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This note was uploaded on 04/07/2010 for the course ELEC ecse 421 taught by Professor Guss during the Winter '10 term at McGill.
- Winter '10