lec18_interruptanal0

lec18_interruptanal0 - Lecture 18: Interrupt analysis O/S...

Info iconThis preview shows pages 1–2. Sign up to view the full content.

View Full Document Right Arrow Icon
Lecture 18: Interrupt analysis O/S Exception/ISR sequence works in the following way : 1.Update status register and make internal copy. 2.Determine priority and mask lower priority interrupts. 3.Acknowledge interrupt priority level. 4.Save program counter status register on stack. 5.Put ISR at head of program counter and execute. 6.Return from Exception and restore previously blocked task program counter and task. NMI: -an NMI (non-maskable interrupt) must have the highest priority, and hence the scheduler stops everything during the time an NMI ISR is executing. -Examples of software NMIs: overwriting memory, array out-of-bounds, divide by 0, max run time, starting run time, context switching, some watchdogs -Examples of hardware NMIs: clocks, some timers, gates Task interference analysis due to initiation and execution of an interrupt: -In order to measure R/T system performance, we need to accommodate the effect of interrupts on the rest of the system. -One needs to set time bounds on a real-time/embedded system for predictability purposes, especially for hard real-time systems. Let t(s) be the time for task s to run by itself.
Background image of page 1

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full DocumentRight Arrow Icon
Image of page 2
This is the end of the preview. Sign up to access the rest of the document.

This note was uploaded on 04/07/2010 for the course ELEC ecse 421 taught by Professor Guss during the Winter '10 term at McGill.

Page1 / 2

lec18_interruptanal0 - Lecture 18: Interrupt analysis O/S...

This preview shows document pages 1 - 2. Sign up to view the full document.

View Full Document Right Arrow Icon
Ask a homework question - tutors are online