lab6_pre_secondweek - EE405 Electrical Design Lab 2009...

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Unformatted text preview: EE405 Electrical Design Lab 2009 Spring __________________________________________________________________________________________ _______________ Lab6. Pre-report for Second Week Graphic User Interface D class Group 2 20060435 4 20050399 4 D) Consider about smooth connection of all the subsystems designed so far. It any hardware of software modifications are required for the initial specification for the digital storage oscilloscope, fix it. 4 K• Ÿ 1 subsystem 4 trigger 4 . 4 trigger ø n ¶ ª , ‘input 4 channel 1 4 channel 2 5 à ’• ‘ level 4 software DAC K • Ÿ ’ , level ø Ž ¶ ª ‘ high 4 low, ø ‹ ¶ ª ‘ low, 4 high . Fà • Ÿ 1 (ø Ž ¶ ª ‘ ) oscilloscope ø ‹ ¶ ª ‘ ø Ž n ª‘ ,ˆ O ¶ ª‘ á• y Ÿ1 o Ÿ trigger 4 EPLD . F K •Ÿ à •Ÿ channel 1 G Œ ¶ ª ‘ PGA ,F rigger 4 t Å· timebase 4 EPLD 5 ø ‹ ¶ª ‘ . 4 4 , PGA 4 . ø Ž selector 4 , 4 trigger ø n ¶ ª ‘ 4 . 4 trigger ¶ª‘ oscilloscope 4 vertical K•Ÿ , F Eà K • 1 gain ø n ¶ ª ‘ , .˜ K Ÿ1 ð n ¶ª ˆc , channel 1 N F GA è n ¶ ª PEÅ trigger 4 channel 1 graphic, ø ‹ n ª ‘ F @{ÿ digital ADC ˆ O ¶ ‘ 0 , sampling pulse F ,4 (-1V 4 F zE software 4 1V) . 4 øŽn¶ timebase 4 . ˜ K• Ÿ 1 ð ‹ ¶ ª‘ ˆc . ø n¶ª input 4 display ø n ¶ ª á • y Ÿ1 N Ÿ ,ø ‹ n ª . ø nBª n @ trigger ø ‹ n ª ‘ ¶ , . 4 E sampling pulse 4 F Lab 6 Graphic User Interface gain F @ÿ Ÿ1 à •Ÿ EE405 Electrical Design Lab 2009 Spring __________________________________________________________________________________________ _______________ software N Ÿ1 K• 1 trigger K •Ÿ1 zÿ . . A DC à K Ÿ 1 GPIO , n ¶ data h, B Å input hB 500 4 h sampling(, • ¶n 503 4 .)4 . 4 sampling pulse 4 trigger à K Ÿ1 , GPIO , n ¶ ª ‘ . GtkB 4Å , N Ÿ zE . K • @Ÿ { 4 ADC 4 input 4 2 x ƒ ¶ channel input , n ¶ ª ‘ ,4 Gtk ,h B Å ˜ K• Ÿ m • ¶ª ˆc . , • n¶ ª ,˜ á • Ÿ m ƒ ¶ª ‘ ˆ c ., ƒ ¶ ª input K•Ÿ ,, ƒ n ª ‘ amplifier , n ¶ ª ‘ 4 (, ƒ n ª ‘ )˜ á K Ÿ 1 mƒn ª‘ ˆ oscilloscope à • 1 . 4 , n¶ pin , n ¶ GPIO pin , ƒ n ª ‘ hB Å 32 5 ,˜ á K Ÿ 1 @{ÿ 0 , ƒnª‘ ˆ . B@ oscilloscope ˜ K • 1 hB 29 5 . à •Ÿ m n¶ ‘ ˆ c ., • n ª , 4 oscilloscope h h Å· thimebase 4 BÅ { ÿ E, , • n ª ‘ trigger 4 oscilloscope function generator x ƒ ¶ ª ‘ horizontal 4 hB ,F n ¶ª E) Design a simple target system of microphone non-inverting amplifier which is to be wired on the breadboard. B readboard 4 microphone , n ¶ o Ÿ1 zE 4. op amp signal  channel h digital storage oscilloscope 4 graphic interface . , •h n ª K•Ÿ1 F) For extra demonstration credit: If some improvements for the digital storage oscilloscope is possible (with little additional hardware), suggest the item for the improvement, and the accompanying additional hardware and software. 4 4 hardware/software , interface board , • ¶ 4 part h . PGA , • ¶ ª h op-amp 5 ,n¶ noise , ƒ ¶ ª ‘ .˜ á K Ÿ1 mƒn ª‘ ˆ VCC, ground , n ¶ ª capacitor , n ¶ ª noise 5 4., • n ª‘ part K•Ÿ noise . ,h B ƒ n ª noise K •Ÿ1 part 4 0 B n@ @_ {.E u N Ÿ zÿ E , @ {ÿ 5 BÅ K • Ÿ1 . Filter , n ¶ ª ‘ 4 .ˆ c O ª ‘ á•ŽŸ1 N Ÿ 1 ,, ƒ n¶ 500 N Ÿ ÿE . , • n ª ‘@ { ˜ K• 1 •n¶ª ˆ c filter . , ƒ hn ¶ ª ‘ Median filter Low pass filter 4 h N 1 zE , software{ , ƒ n ª ‘ @ hardware ,h Å K • Ÿ 1 , n ª‘ . 4 median filter , n ¶ ª ,ˆ c ¶ ª •y Ÿ1 , ˆ cŸ O ª ‘ á yŽ 1 N Ÿ1 ,•n¶ª ,N Ÿ ÿE . 4 lowÿ pass filter @{ ,h B , n¶ noise K •Ÿ1 input . , B• Å n ¶ low pass filter ˜ K • Ÿ 1 mƒ ¶ª‘ ˆ 4 . ˜ K• Ÿ m n¶ª ˆ c O, N Ÿ1 zÿE , @ low pass filter 4 0 Bn@ @_ @ ÿ E. à •Ÿ 4 ,4 timebase 4 sampling 4 ˜ á •Ÿ mƒn ª ˆ . (ˆ c ¶ ª ‘ á yŽŸ N Ÿ1 .ˆcO¶ ‘ á•y Ÿ1 Ÿ, sampling à K• 1 , , n¶ input ˆ c O ª ‘ •y Ÿ1 N Ÿ 1˜ á K Ÿ . m n ª‘ ˆ ,4 à •Ÿ .4 BÅ Lab 6 Graphic User Interface ...
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This note was uploaded on 04/08/2010 for the course EE EE405 taught by Professor Bkkim during the Spring '10 term at 카이스트, 한국과학기술원.

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