lab4_final_report - Time-base Purpose &b...

Info iconThis preview shows pages 1–3. Sign up to view the full content.

View Full Document Right Arrow Icon

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full DocumentRight Arrow Icon
This is the end of the preview. Sign up to access the rest of the document.

Unformatted text preview: Time-base Purpose &b digital storage oscilloscope time-base software, hardware N . Time-base EPLD(Electrically Programmable Logic Device) interface " * . d * & hardware software . Problem Statement Command client * @ @ time base X * . " * & pulse X * e * A/D converter . & N 50 us/screen ~ 500 ms/screen . Y * 1screen 10 division 5us/div ~ 50 ms/div N. division 50 sample sampling . pulse 100ns~1ms pulse Y signal . & N crystal X * 40MHZ . 25ns & b pulse . Experiment sequence and result analog input signal sampling sampling rate . x verilog " * chip Y . Chip p @E & @ E & & @ E @E ` V ` V H & . & velilog code Y . module EPLD(hori,scale,clk,pol,trg,b,out); input[1:0] hori; input[1:0] scale; input clk,pol,trg; input b; output reg out; assign valid=pol^trg; reg a=1; reg c=1; reg check=0; reg [9:0] count500=0; reg [15:0] count=0; reg [3:0] value1=0; reg [9:0] value2=0; always @(hori or scale) begin case(hori) 2'b00: value1<=1; 2'b01: value1<=2; 2'b10: value1<=4; 2'b11: value1<=10; endcase case(scale) 2'b00: value2<=1; 2'b01: value2<=10; 2'b10: value2<=100; 2'b11: value2<=1000;...
View Full Document

This note was uploaded on 04/08/2010 for the course EE EE405 taught by Professor Bkkim during the Spring '10 term at 카이스트, 한국과학기술원.

Page1 / 5

lab4_final_report - Time-base Purpose &b...

This preview shows document pages 1 - 3. Sign up to view the full document.

View Full Document Right Arrow Icon
Ask a homework question - tutors are online