Lecture10 - Announcements ECE 2300 Introduction to Digital Logic Design Spring 2010 Lab 4 posted Prelab due Friday March 5 at noon CLK D D

Info iconThis preview shows pages 1–2. Sign up to view the full content.

View Full Document Right Arrow Icon
Spring 2010 ECE 2300 Introduction to Digital Logic Design Sequential Logic and Finite State Machines 1 Lecture 10: Announcements Lab 4 posted – Prelab due Friday, March 5, at noon Prelim 1 Tuesday, March 2, 7:30-10pm, PH 101 Closed book and notes Covers all lectures through today Contact me ASAP if you have a conflict 2 Lecture 10: D Flip-Flop CLK Q Q D C Q Q D C D Q CLK D Q D CLK Q QN 0 0 1 1 1 0 X 0 Last Q Last QN X 1 Last Q Last QN Q Q D CLK 3 Lecture 10: T Flip-Flop “Toggle” flip-flop Changes state each time T pulses Useful for counters Q Q T Q Q D CLK T Q 4 Lecture 10: T Flip-Flop Counters 3-bit T flip-flop counter When all lower significant bits are 1’s ! toggle this bit on next CLK Q 2 Q 1 Q 0 0 0 0 0 0 1 0 1 0 0 1 1 1 0 0 1 0 1 1 1 0 1 1 1 0 0 0 0 0 1 0 1 0 0 1 1 1 0 0 Q Q T Q Q T Q Q T CLK Q 2 Q 0 Q 1 5 Lecture 10: T Flip-Flop with Enable Changes state only if enabled Useful for many counter functions Q Q EN T 6 Lecture 10: J-K Flip-Flop A flip-flop version of an S-R latch Q = J•Q’ + K’•Q 7 Lecture 10: Latch Output follows input whenever enable asserted Output “latches” its last value when the enable deasserted Types S-R latch " Set/Reset latch D latch " Data latch 8 Lecture 10: Flip-Flop Output changes only on triggering clock edge Positive edge triggered ! rising edge of clock Negative edge triggered ! falling edge of clock Types D flip-flop " input captured on the output J-K flip-flop " similar to S-R latch T flip-flop " output flips between 0 and 1 on each
Background image of page 1

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full DocumentRight Arrow Icon
Image of page 2
This is the end of the preview. Sign up to access the rest of the document.

This note was uploaded on 04/10/2010 for the course ECE 2300 taught by Professor Long during the Spring '08 term at Cornell University (Engineering School).

Page1 / 4

Lecture10 - Announcements ECE 2300 Introduction to Digital Logic Design Spring 2010 Lab 4 posted Prelab due Friday March 5 at noon CLK D D

This preview shows document pages 1 - 2. Sign up to view the full document.

View Full Document Right Arrow Icon
Ask a homework question - tutors are online