Lecture08

# Lecture08 - Announcements ECE 2300 Introduction to Digital...

This preview shows pages 1–2. Sign up to view the full content.

Lecture 8: 1 ECE 2300 Introduction to Digital Logic Design Arithmetic Logic Units Spring 2010 Lecture 8: 2 Announcements HW 4 is on Blackboard No class Feb 22 Make up class is Feb 26 at the usual time and place Prelim 1 Tuesday, March 2, 7:30-10pm, PH 101 Closed book and notes Covers all lectures through Feb 24 (not Feb 26) Lecture 8: 3 Arithmetic Logic Units ALUs are combinational logic circuits for Multi-bit arithmetic functions Multi-bit logical functions Multi-bit shift and rotate functions Typical Inputs Data buses Single data bits Operation codes Typical outputs Data bus Single data bits Condition flags Lecture 8: 4 ALU 3 B A Y O CI OP Z CO RO RI 8 8 8 An 8-bit Arithmetic Logic Unit Lecture 8: 5 ALU Arithmetic Functions Given n-bit inputs A and B, compute A, B, A+B, A-B, B-A, A+1, A-1, B+1, B-1, 0, 1, -1, … ALU may actually compute A+CI, B+CI, A+B+CI, A-B+CI, B-A+CI, A+1+CI, A-1+CI, B+1+CI, B-1+CI, 0, 1, -1, … Two ALUs are cascaded into a larger ALU CI of least significant ALU set to 0 or 1, depending on arithmetic function CI of higher order ALU fed by CO of next least significant ALU Lecture 8: 6 ALU Logic Functions

This preview has intentionally blurred sections. Sign up to view the full version.

View Full Document
This is the end of the preview. Sign up to access the rest of the document.

{[ snackBarMessage ]}

### Page1 / 3

Lecture08 - Announcements ECE 2300 Introduction to Digital...

This preview shows document pages 1 - 2. Sign up to view the full document.

View Full Document
Ask a homework question - tutors are online