Lecture02 - Announcements ECE 2300 Introduction to Digital...

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Lecture 2: Spring 2010 ECE 2300 Introduction to Digital Logic Design CMOS Gates 1 Lecture 2: Announcements Blackboard web site ENGRD2300-Albonesi-Spring2010 You can now pre-enroll Homework 1 is on Blackboard Due Wednesday, Feb 3 at noon in the homework drop box Labs start Feb 8 Professor Long’s office hours – Tuesday and Thursday, 3-4pm, Phillips 204 2 Lecture 2: Logic Levels Digital systems only recognize two values High voltage range ( green ) Undefined region Entered when transitioning between logic levels Low voltage range ( red ) Logic “1” (HIGH) Undefined Region Logic “0” (LOW) 5.0 V 3.5 V 1.5 V 0.0 V 3 Lecture 2: Fundamental Digital Logic Functions AND Gate OR Gate NOT Gate X AND Y = X•Y X OR Y = X+Y NOT X = X’ = /X 4 Lecture 2: Inverter Operation When the input voltage is low (0), the output should be pulled up to the voltage supply (1) When the input voltage is high (1), the output should be pulled down to ground (0) 5 Lecture 2: Modeling an Inverter with Switches This switch type closes when V IN = L This switch type closes when V IN = H 6 Lecture 2: NAND gate 7 Lecture 2: H L L Z B A Output Inputs NAND – Switch Model 8 Lecture 2: L Z B A
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This note was uploaded on 04/10/2010 for the course ECE 2300 taught by Professor Long during the Spring '08 term at Cornell University (Engineering School).

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Lecture02 - Announcements ECE 2300 Introduction to Digital...

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