1. Basic Logic Design

1. Basic Logic Design - 1 1.1 Design of Logic Circuits...

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1 1 Design of Logic Circuits 1.1 Basic Revision of Logic Gates In the following chapter, we assume a two input logic gate with inputs A and B . 1.1.1 Simple Gates i. AND Gate The symbol and truth table for an AND gate is shown below: A B A.B 0 0 0 0 1 0 1 0 0 1 1 1 Summary: If inputs A AND B are high then the output is high Abbreviations: often a ‘ . ’ (dot) is used to signify the AND operator when writing Boolean equations. ii. OR Gate (Sometimes referred to as an Inclusive OR) The symbol and truth table for an OR gate is shown below: A B A+B 0 0 0 0 1 1 1 0 1 1 1 1 Summary: If inputs A OR B are high (or both) then the output is high Abbreviations: often a ‘ +’ is used to signify the OR operator when writing Boolean equations. iii. NOT Gate The symbol and truth table for an NOT gate is shown below: A A 0 0 0 1

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2 Digital Electronics – EEE3017W (2009) Summary: Output is NOT what the input is. They are also called 'inverters'. Abbreviations: Many. Sometimes a line above the thing that is being notted, sometimes a dash ‘ ' ’ and sometimes an ‘ ! exclamation mark 1.1.2 Complex Gates i. NAND Gate Made by combining an AND gate and a NOT gate. The equivalent circuit is: The symbol and truth table for an NAND gate is shown below: A B B . A 0 0 1 0 1 1 1 0 1 1 1 0 ii. NOR Gate Made by combining an OR gate and a NOT gate. The equivalent circuit is: The symbol and truth table for an NAND gate is shown below: A B B A + 0 0 1 0 1 0 1 0 0 1 1 0 iii. XOR Gate (Exclusive OR) This gate gives a high output when A OR B are high, but not both. The equivalent circuit is:
3 University of Cape Town The symbol for a XOR gate is: A B B A 0 0 0 0 1 1 1 0 1 1 1 0 Summary: B . A B . A B A + = Abbreviations: XOR gates are represented with a symbol. 1.2 Boolean Algebra 1.2.1 Basic Boolean Equations When designing circuits it is useful to be able to simplify logic equations. By simplifying the equation of a circuit we can reduce the number of gates that will be needed to implement the circuit when it is constructed. This has cost and performance benefits. The following equations are used to reduce logic equations: OR: A + 0 = A A + 1 = 1 A + A = A 1 A A = + AND: A.1 = A A.0 = 0 A.A = A 0 A . A = NOT: A A = ASSOCIATIVE A+(B+C)=(A+B)+C A.(B.C)=(A.B).C DISTRIBUTIVE A.(B+C)=A.B+A.C A+B.C=(A+B).(A+C) COMMUNTATIVE A+B=B+A A.B=B.A Remember that the optimal solution is not always the solution with the fewest gates. In terms of cost the optimal solution is generally that solution which has the fewest logic chips, assuming that the cost of logic chips does not differ greatly for different logic gates. (A chip which contains four AND gates costs roughly the same as a chip with four OR gates.) This has not always been the case.

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1. Basic Logic Design - 1 1.1 Design of Logic Circuits...

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