{[ promptMessage ]}

Bookmark it

{[ promptMessage ]}

tutorialXilinx11

tutorialXilinx11 - Xilinx and Nexys2 Tutorial Kartik...

Info iconThis preview shows pages 1–9. Sign up to view the full content.

View Full Document Right Arrow Icon
Xilinx and Nexys2 Tutorial Kartik Mohanram Dept. of Electrical and Computer Engineering Rice University, Houston, TX
Background image of page 1

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full Document Right Arrow Icon
ELEC 326 Digital Logic Design 2 Verilog synthesis+simulation with Xilinx Xilinx Project Navigator Icon on your Desktop
Background image of page 2
ELEC 326 Digital Logic Design 3 Open a new project called decoder2to4 Choose a working directory (C:\...\decoder2to4) and name the top level module there (decoder2to4)
Background image of page 3

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full Document Right Arrow Icon
ELEC 326 Digital Logic Design 4 Device options, etc. The next step is to select the target device and its specs from the board (Spartan3E, xc3s500e, fg320); to specify Verilog as the input HDL language
Background image of page 4
ELEC 326 Digital Logic Design 5 Create a new top level module decoder2to4 in the project Adding new Verilog source
Background image of page 5

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full Document Right Arrow Icon
ELEC 326 Digital Logic Design 6 Initialize project directory
Background image of page 6
ELEC 326 Digital Logic Design 7 Enter the source Use bottom tabs to select the source file, key in the Verilog description, and save it Design constraints+actions: synthesis+implementation, bit-file generation, etc.
Background image of page 7

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full Document Right Arrow Icon
2-to-4 decoder example
Background image of page 8
Image of page 9
This is the end of the preview. Sign up to access the rest of the document.

{[ snackBarMessage ]}