Lab3 - ELEC 2607 — L90 Lab 3 — T-Bird Tail Light Control Using a CPLD Due Matt Taylor — 100711744(Design Ruqia Nur — 100?16528(Remainder

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Unformatted text preview: ELEC 2607 — L90 Lab 3 —- T-Bird Tail Light Control Using a CPLD Due: March 07, 2008 Matt Taylor — 100711744 (Design) Ruqia Nur — 100?16528 (Remainder) Introduction The purpose of this lab was to simulate the tail lights of the Ford Thunderbird. The pattern of the tail lights was replicated using three switches and a D Flip Flop. The three switches are left, right and brake. However, the emergency lights are simulated when the left and right are concurrently simulated. Once again, the design was simulated using Xilinx and Modelsim (a computer program) to test all components of the circuit, like the gates and connections. Once simulated a waveform of the output was generated. ___The design was then to be uploaded to a Complex Programmable Logic Device (CPLD). This progi‘an'finwab—TEHEWES '66"I‘fta"'1’ris‘a's'emf‘ljtittfiifiafid—EEDs,‘which'p‘foiiide_a"‘fi'isua “m representation of the bulbs in the T-Bird tail lights. This simulation is doue to check for functionality. Sgecifications The purpose of this lab was to simulate the tail lights of a T—bird. The main requirement of this lab was to construct appropriate timing circuits and logic gates for the tail lights. The desired circuit was created using Xilinx, which was used in the previous lab, the binary adder. Furthermore, the circuit was tested using a CPLD (Complex Programmable Logic Device), which contains about a thousand gates, which creates flexibility with design and no limitations- In designing the circuits, we were given templates in which we were to wire and add the necessary logic gates, for completion. The controls consisted of a left-tum shifter (to activate the left flashers), right—turn shifter (to activate the right lights) and a brake switch (representing the brake pedal). Moreover, the left and right switches had to flash in a specific sequence and timing. For example the left light is comprised of three lights lined up together, when the left switch is activated light one turns on first, then the second, then the third, then all lights turn off and the sequence repeats until the left switch is deactivated. This sequence can be seen in figure 1 in the design sectiou, where the light sequence is explained in more detail. Design The design requirement was to simulate the tail lights of the Ford Thunderbird. The car features three lights on both the right and left side of the car. The lights are controlled by the right-tum and left—turn shifters and the brakes. When either the right or left turn signal is activated this causes the lights to turn on sequentially and repeat, as shown in figure 1 below. 1/ Figure 1: Turn signal for a leftstum Figure I provided by John Knight’s T—Bird Prefab There are four states for the lights as shown in figure 1. ‘When a right turn is selected, the lights tum on from right to left. When both the left and the right turn signals are activated this simulates the emergency flashers, this causes all 6 lights to blink at the same time. When the brakes are pressed it causes all the lights to turn on. If one of the turn signals is on and the brakes are applied, the turn signal remains constant, and the other set of lights is solid, indicating the brakes have been applied- Therefore the lights have eight possible states. The design was partitiOned into three smaller circuits, the counter, the left control box and the right control box. The counter uses a constant clock input; the input is feed into a flip-flop. However this only gives us two output states 00 and 11, we need fdufstatES for the lights to function. Therefore we used an inverter to feed the output Q from the flip-flop back to D. The circuit is shown in figure A2 in the appendix. This gives us two new output states, 01 and 10. The inverter also effectively stretches the clock cycle by 2- The waveform is shown in figure 2 below. CLKi i_._ i 00 Figure 2: Waveform from the flip—flop showing the CLKJQ Both CLK and Q0 can be used as inputs giving us the four different states we needed, these states are 00, 01, 10, and 11. The left control box and right control box are very similar. Before we designed the circuit to control the lights, we determined the desired outputs based on the possible inputs Q0 and CLK from the flip—flop. The outputs we want are shown in table 1. Table 1: Truth table for desired outputs baSed on available states From the truth table, we derived equations for each of the outputs, they are listed below: 3" I..."- Ernerg = CLK Litefil = Q0 + CLK Lite_2 = Q0 69 CLK r” Lite_3 = (i) - CLK ,— Using the equations derived above we added the required gates to our counter circuit to give us the required outputs, Litefll, Lite_2, Lite_3, and Emerg from the clock signal. The completed counter circuit is shown in figure A2 in the appendix. The outputs discussed above are now used as inputs for the left and right coutrol boxes. However there are three other inputs. The inputs would be frorn the driver of the car; they are the left—turn shifter, the right—tum shifter, and the brake pedal. L, R, and B represent these inputs respectively. We used a Kamaugh map to determine the output type for these inputs. The left side output is shown in figure 3 below. Figure 3: Kamaugh map for the left side output types for the various inputs Using the map above we easily obtained the bulb equations for the left side. These equations are listed below: BULB_L1 = (Lite_1)Lfi + (Emerg)(]—3LR) + (BI:+ BR) BULB_L2 = (Lite_2)LIE + (EmergX—BLR) + (BI: + BR) ‘ /" BULB_L3 = (Lite_3)Lfi + (EmergX—BLR) + (BI: + BR) Using the equations derived above we designed the complete left control box, as shown in figure A3 in the appendix. To design the right control box we used the same method. We used a Kamaugh map to determine the required output types. The map is shown in figure 4, note the different arrangement of inputs L and R from figure 3. .. ' 3 \3m_ I ‘ <1 } \w . /’ Figure 4: Kamaugh map for the right side output types for the various inputs Using the map above we easily obtained the bulb equations for the left side. These equations are listed below: BULB_R1 = (Lite_1)iR + (Emergxé LR) + (BL + Bi?) _, ,2 BULB_R2 = (Lite_2)iR + (EmerngLR) + (BL + BR_) BULB_R3 = (Lite_3)LR + (EmergXBLR) + (BL + BR_) Using the equations derived above we designed the complete left control box, as Shown in figure A4 in the appendix. The completed circuit incorporating the counter and both control boxes is shown in figure A1 in the appendix. Imglementing and Testing In this lab we were required to design a circuit that simulated the tail lights of the Ford Thunderbird. The circuit was deigned using equations derived in the prelab. The circuit was then constructed using Xilinx. We could then test the design by running a simulation using the software Modelsim. We constructed the circuit in Xilinx without difficulty and then we were to simulate it. There were 8 test cases that we wanted to check, these test cases include: All input signals LOW Only the left signal HIGH I/‘\ Only the right signal HIGH " Only the brakes HIGH \ The brakes and left signal HIGH The brakes and right signal HIGH The Emergency flashers (both the right and left signals HIGH) All inputs HIGH Poflg‘inikERNt‘ A partial test code was provided; we had to add tests 6, 7 and 8. The completed test code is provided in the appendix, see A6. The circuit was loaded into Modelsim and simulated using the test code. It simulated with no errors, however the waveform outputs were incorrect. After an hour of debugging and with the assistance of several TAs we discovered that the wrong input; Lite_3 was being feed into Buib_Ll. After correcting the circuit we simulated it again and the output waveform produced was correct. The waveform was printed and annotated showing the 8 different cases. The waveform is shown in figure A5 in the appendix. At this point we ran out of time and were unable to program the circuit Onto the Xiiinx XCR3064XL—6 PC44 CPLD. Since our waveform was correct, the CPLD would have simulated the waveform accurately using the two sets of three LEDs and three Switches. Since the wiring pins were already programmed into the circuit by the lab coordinator, the CPLD simulation would have been successful; unfortunately we did not have enough to complete this. ,1 J/"f Summary The purpose of this lab was to construct a cemplete set of lights for the Ford Thunderbird. This was once again accomplished through the use of Xilinx and tested using Modelsim, which tested all the possible cases. By an in-depth analysis of the wavefonn, Figure A5 in the appendix, we were able to come to the conclusion that our circuit behaved as expected. From here however, we were unable to upload our circuit onto the CPLD, due to an error that took ourselves and the teaching assistants and hour and a half to figure out. Because of that we are unable to conclude that our lab was a complete success. However, if more time was permitted we would have successfully completed the entire lab. Furthermore, some specifications of the working lights were that the brake switch would override the emergency signal, and that a turn signal (left or right) would override the brake signal. As discussed previously a template for the circuit was provided at the start of the lab. The basic circuit layout was provided, which meant that to complete the lab we had to design the logic gates and complete all necessary connections. Through the completion of the prelab, this was already designed and all that was required was to create the circuit on Xilinx. This included logic gates and connections for the three control switches: left, right and brake. Since we were unable to upload our circuit logic onto the CPLD we were unable to complete the lab. The problem that we encountered in our lab, was that when creating our left Switch we mistakenly hooked up Lite_1 to Bulb_L3 and Lite_3 to Bulb_L1. This was the problem that took an hour and a half to solve because it was such a Small detail and was hard to spot. A suggestiOn to this lab would to allow the students to change the outputs or inputs on the CPLD board. Instead of having the pins already selected to use the LEDs and the input push buttons, the students could learn more about programmable logic boards by doing the actual work of selecting the outputs. This would give students a better understand of how these devices work. Commentary The use of computer programs such as Xilinx and Modelsim is an excellent way to see the theoretical behaviour of the designed circuit. This is a great way to design the desired circuit without waste, because there is no trial and error you know that the logic and connections involved are correct because the output is correct. However, this could never replace a tangible circuit but is a great way to complete the design proceSS. However, by testing the circuit using a CPLD, this shows whether or not the circuit behaves properly. In this lab we simulated a design using a D Flip Flop, which is widely used in digital circuits. The use of a D Flip Flop is a vital skill necessary in the field of Electrical Engineering. Furthermore, by using simulations cost and research is fractional, which makes this a great way to design prototypes. The circuit created was a light package that could be used in any vehicle. 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NJImJDmEEEXEwmQ_at Samfimzméxmamh]?at A6: Comgleted test code for Xilinx Additional tests added to code are in BOLD. // Verilog test fixture schematic TBirdTestFixture.v — Jan 30, 2005 ‘timescale ls / 1ms module TBird_TestFixture; // Outputs from your Circuit wire :3ULB_L1, BULB_L2, RUT.R_T.3, sUT.R_R‘I, RUT.R_R2, BULB_R3; wire CLK; // Inputs to your circuit reg L, R, B, RST, fCLK; // Generate a clock, real Time; initial begin fCLK=O; Time=0; forever #0.5 Time=Time+D.5: //Keep track of time in sec. end //$time in Modlesim gave ps? always // (0.5 seC}/4 = 0.0625 sec. begin #0.062 fCLK=~fCLK; // Correct lack of 4 digit time resolution. #0.063 fCLK=~fCLK; // by using a slightly asymmetric clock. end/ // TESTS STE-\«LT HfiRF‘ // w ‘ — F " _ “ _ _ _ _ _ _ " — __= _ _ _ _ _ _:—_=_=___=_==:_==:===========::::2:::::: // Set all the switches low initially initial begin L=0i R=0F 3:0; // Do an initial reset to make Q0 =0 at the start of the simulation. RST = O; #0.1 RST = l; // Set RST high after a 0.1 s delay #1.? EST 0; // Set RST low after an additional 1.7 s delay // These fractional delays are so we don't change switches // exactly on the Clock edge. ll //Test 0: No switches on Time = 0.1+l.7 = 1.85 L = 0; R = 0; B = 0; #5 // Delay 5s for a total of 6.83 #3 // Delay 3s for a total delay of 9.85 //Test 1: Left signal; // This test starts at about 10 sec. (9.83} L = 1; R20; 3:0; // B and R remain at 0 #7 // Delay 73 for a total of 16.83 L = 0; //Leave flat lines between tests #3 // Delay Es for a total of 19.83 //Test 2: Right signal on, Left off; starts at about 20 s (19.8s) R = 1; L20; B20; // L and B remain at O #7 // Delay 5s for a total of 26.8s R = 0; #3 // Delay 5s for a total of 29.8s //Test 3: Brake; at about 30 s B = l; LID; R=O; 7 // Delay 75 for a total of 36.8s B = 0; #3 // We'ay 35 for a total of 39.8s //Test 4: Brake and left flashers; starts at about 40 s B = l: L = l; R=D; #7 // Delay Vs for a total of 46.8 s L = O; B = O; #3 // Leave some flat lines between tests // Make Test 5 easy to find by starting it at about 50 s l/TEST 5: BRAKE AND RIGHT FLASHER B=1; R=1; #7 L=D; 3:0; #3 I/TEST 6: EMERGENCY LIGHTS L=1; R=1: #7 L=D; R=O; #3 ’lTEST 7: ALL SWITCHES HIGH 3:1; L=1: R=1; #7 3:0; L=O; R=D; #3 #10 sstop; end // Connections to the Unit Under Test tbirdtop UUT(.fCLK{fCLK) , .RST(RST), .L(L), .R(R}, .B(B), .BULB_L1(BULB_LI_) , .BULB_L2 (BULBHL2JI , ._5ULB__L3 (aULB_L3) , .RUPQ_R1(RULB_R'), .RUR?*R2{RUKR_R2}, .BULB_R3(BULB_R3), .CLK(CLK)); //-———-——————---————————————————“——"—‘r“‘-==:'—:::::::::=:== //::::::::::::::::::::: Bad :=:====:::::::====: // Good students should be able to interpret the obvious signals. // // _| [__| // // // // __.___[ lml | |—] // One can also look at the messges in the simulation log, // // // re Comparison SeCtion; calculates what the lights should be. 9 q; reg [3:1] Lite; // Holds what the lights should be. wire [3:1] CkBL, CkBR; //Check_BulbqRight, Check_3ulb_Left Wire Edsel; // If this goes high, there is a mistake in the Circuit. always @(posedge CLK or posedge RST) if(RST) q (=0; else q<= ~q; always @(CLK or q) begin a. a // Lite[l]: q | CLK; Lite{2]= q A CLK; // XOR Lite[3]= (~q) & CLK; end ssign CkBLElJ= Lite[13&L&(~R) I CkBL[2]= Lite[2]&L&(~R) I CkBLi3]: Lite[3]&L&(~R) I ssign CkBRIlJZ LiteEl]&R&{~L) | CkBRI21= Lite[2]&R&(~L) | CkBRI3J= Lite[3]&R&(~L) | Delay rising edge of Edsel OK. CLK CLK CLK CLK CLK CLK &{~B}&L& &(~B)&L& &{~B)&L& &(~B)&L& &(~B)&L& &(~3}&L& W w W R R R CK CK i 3&((~L) I 3&((~L) | 3&((~L) I 3&((~R) [ 3&((~R} { 3&((~R} .1 sec to miss clock glitches: R) I R) J R): L}, L}! L); falling edge (CkBL[2]1=BULB_L2} | 1 (CkBR[3]!=BULB_R3); BULB_L3, 3L[3], 30LB_R3, 3RE3], assign #(O.l,0} Edsel = (CkRL[l]I:RU.%_E1} [ {CkBL[3]!=BULB_L3)t (CkBR[l]I=BULB_Rl) | (ijfl[2]!=jULB_R2) always@(posedge Edsel} begin if (Edsel) begin $display{“SW LRB = %3b", L,R,B, "; LlL2L3 = %3b", BULB_L1, BULB_L2, ": Should be %3b“, CkBL[1], Ck3L[2], ”; RLR2R3 = %3b", BULB_Rl, 3ULB_R2, "; Should be %3b", CksR[1], Ck3R[2], "; appr time (s) =%5.1f", Time); end end // ============= End of comparison Section —“ endmodule ...
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This note was uploaded on 04/13/2010 for the course ELEC 2607 taught by Professor Lee during the Winter '10 term at Carleton CA.

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Lab3 - ELEC 2607 — L90 Lab 3 — T-Bird Tail Light Control Using a CPLD Due Matt Taylor — 100711744(Design Ruqia Nur — 100?16528(Remainder

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