370L30 - EECS/CS 370 Input/Output Systems Lecture 30...

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EECS/CS 370 Input/Output Systems Lecture 30
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Homestretch 6 lectures on I/O Systems This week: System organization What are all those chips on the motherboard? Next week: 2 Guest lectures + 1 lecture Material Still covered on exam4 Wednesday Dec 5 lecture in Chesebrough Auditorium Exam 4: Dec 10 @ 7:00pm
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System Level Design System  System  Memory  Memory  (DRAM) (DRAM) Chipset Front-Side  Bus I/O I/O I/O Graphics Processing  Unit Local Frame Buffer e.g. A.G.P. (SRAM) (SRAM) L2 Cache L2 Cache Back-Side   Bus Core Processor The Host Processor The Host Processor L1 L1 Cache Cache (SRAM)
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Types of buses (Memory bus) Processor / Memory Short distances (inches) High speed (100MHz or higher) Little contention/connectivity (CPU and mem) Proprietary communication standards Examples: Back side bus (L1 to L2 connection) Front side bus (L2 to system controller)
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Motherboard The motherboard connects the processor to the Memory Graphics processor I/O cards
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Motherboard Chipsets Control processors help the CPU by performing maintenance tasks.
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370L30 - EECS/CS 370 Input/Output Systems Lecture 30...

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